"In what must have seemed to many as a bold move, Sun Microsystems last week announced that it would released the source code for its UltraSparc T1 processor under the GPL, supported by a new organization that it calls OpenSPARC.net. But to those that have been around for a while, the announcement had an eerily familiar sound to it, and that sound was the echo of an organization called SPARC International. Formed 18 years ago to license the SPARC chip design to multiple vendors to ensure second sourcing for the hardware vendors that Sun hoped would adopt it, SPARC International seemed to be every bit as revolutionary for its time as Sun's new initiative does today. SPARC International's site, looking very retro and neglected, can still be seen - at least for now."
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Member since:
2005-07-06
Member since:2005-07-06
There were a few more than just fujitsu, but I think the shear cost of designing the architecture is too prohibitive for most companies.
SPARC, IIRC, only actually gave away the ISA, it was up to the respective licencing company to design their own architecture to which the ISA was to run ontop - hence the design differences between Fujitsu's SPARC64 and SUN's UltraSPARC.
Member since:2005-07-21
Member since:
2005-11-10
SPARC is an IEEE standard, meaning that you have access to the ABI, ISA, etc. It is up to the implementer to actually produce the silicon, there have been plenty of people using the SPARC other than Fujitsu. SPARC has been an open standard since its birth (more or less), there is a difference between the standard and the actual implementation in silicon.
In fact SUN released their v8 implementaiton as an open source in the late 90s....
Member since:
2006-02-21
I thought SPARC International was just a branding consortium. You pay them $100 and follow conformance testing to say you are 100% genuine SPARC. Right?
OpenSPARC is different, this time you get the code for simulating an actual CPU. Right?
The couple of times I have visited SPARC International's website, I never got the impression they delivered pre-designed cores. All I did there was download the SPARCv9 document for reference information.
Member since:
2005-07-08
Well already there has been some chit chat about being the 1st to do this in FPGA on comp.arch.fpga since the Leon is well known and already done in FPGA. The Verilog source is 320,000 lines of code which doesn't necessarily mean much except its way too much for an FPGA cpu.
