Linked by Thom Holwerda on Thu 7th Jul 2005 19:16 UTC
IBM IBM has today presented various new versions of their G5 processor at the Power Everywhere Forum in Japan. Firstly, it introduced the much-anticipated PowerPC 970MP, the dual-core version of the G5. In addition, they also announced 3 low-power G5s, ranging from 1.2Ghz at 13W to 1.6Ghz at 16W. These processors will most likely find their way into Apple's Macs.
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@Yonah
by rayiner on Thu 7th Jul 2005 22:39 UTC
rayiner
Member since:
2005-07-06

1st: I don't even own a Mac, I never had one for more than a decade.

LOL, my apologies. Though, you have to admit that your post had a rather "fanboy" tone...

Pentium M's are based on Pentium III's architecture, yes. They have numerous enhancements also like a beefier Brach Predictor, really good power management

Pentium Pro architecture, actually, and yes it has macro-ops fusion and a better bus and a number of other things. I'm familiar with the architecture. It's still the same exact execution engine behind all the front-end stuff. It's quite a stretch to say that it's better than anything IBM has up its sleeve, at least in the desktop space, especially since its not 64-bit, and especially since it is missing a lot of the niceties that the amd64 instruction set brings to the table (no more x87 FPU, no expanded register file, etc).

3rd: the Yonah processor will not only be a dual-core version of the Pentium M. It will have many important enhancements to it, including SSE3, better power management and power consumption.

For all intents and purposes, it will be. Power management and power consumption is really quite irrelevent (to a point) in desktop space, and SSE3 by itself does not by itself buy you more than 1-5% on most code.

It will also feature an enhanced floating point engine and a beefed up instruction decoder that can handle "several" SSE instructions in parallel.

That statement, while true, is mostly irrelevent. The decoder will be updated to remove some bottlenecks that currently exist. However, the execution core will be unchanged. That means that the performance of the chip will only improve to the extent that the decoder was the bottleneck in current versions of the chip. Yonah will still only be able to execute half a 128-bit SIMD instruction per cycle.

Yonah is a well-designed chip, no doubt. But its not a leap ahead of the PPC970 of K8 architectures (or even ahead, depending on the code), especially considering its 2006+ release date.

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