Linked by Thom Holwerda on Thu 7th Jul 2005 19:16 UTC
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Member since:
2005-07-06
Actually, the current dual-core processors from AMD give each processor a dedicated L2, and allow them to communicate at high-speed over the on-chip SRQ (system request queue). Having dedicated L2 caches has some advantages, in that it allows greater bandwidth per processor, and easier scalability to quad core configurations. It also has some disadvantages, namely more cacheline ping-ponging when both processors are working on the same data.