Linked by Thom Holwerda on Thu 18th Aug 2005 16:46 UTC, submitted by Nicholas Blachford
Intel "At next week's Intel developer forum, the firm is due to announce a next generation x86 processor core. The current speculation is this new core is going too be based on one of the existing Pentium M cores. I think it's going to be something completely different."
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Nicholas Blachford
Member since:
2005-07-06

You make a lot of good points, and in many cases you're right but you're looking at it from the point of an engineer, not a company who's sole purpose is $$$.

SPEs speed
I worded this badly, it means they are fast at the sort of things SPEs are designed for, not everything. As for their integer performance, I don't think they've released any benchmarks.

Based on Itanium.

Itanium is only one implementation of a VLIW architecture, Transmeta and Elbrus are others. The Elbrus designers didn't like Itanium and claimed they could do a lot better than Merced, this was 10 years after their first VLIW design.

I think Intel will be very useful for Intel to learn from but I don't think a new VLIW design will be Itanium based. It'll be closer to the Transmeta designs (which Elbrus thought were much better).

Single threaded performance.

Most PCs are bought by corporations or home owners to run Word, surf the Web and read email. Single threaded performance really isn't that important to those people.

The entire point is going this road will mean smaller cooler cores, if Intel can put more cores on a chip they'll sell more. Yes the enthusiasts will all think this sucks and go and buy AMD but that hardly matters since they do that anyway and in any case are only a small part of the market.

Intel will be able to get more sales by marketing the number of cores and selling variation such as 16, 14, 12 and 10 cores, if AMD are only doing 4 or 8 cores they're in trouble. Benchmarks wont help, there'll be sets provided by both sides, difference is Intel has more marketing clout.

Cache
A low latency cache is good of course but Intel shows a clear trend of going to ever larger cache sizes quickly. A smaller low latency cache has to be balanced against a larger, higher latency cache which avoids going to memory more - which has a latency positively massive in comparison. If they manage 16 cores at 65nm I'd expect them to include a huge external L3 / L4.

Risk taking
Intel *can* afford to take risks, they have the money to do several new core designs simultaneously. It's AMD who can't take too many risks, if they get it wrong they could be in trouble.

However, Transmeta have proven the technology works. It's not radical new technology.

That said AMD have experimented with this sort of design as well, one of the alternatives to the K8 was VLIW based, even the G5 contains VLIW like technologies.

Interestingly IBM and AMD are getting very cosy these days, IBM have exactly the kind of this technology I was talking about in their R&D labs.

Multithreading
Everyone is going multi-core now, multithreading may not be easy but it's not exactly a new idea.



BTW - I'm not the first to have predicted this, someone on Ace's hardware pointed out a similar prediction from 2002 - for AMD.

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