Linked by Thom Holwerda on Tue 24th Apr 2007 21:09 UTC
Hardware, Embedded Systems The prototype for a revolutionary new general-purpose computer processor, which has the potential of reaching trillions of calculations per second, has been designed and built by a team of computer scientists at The University of Texas at Austin. The new processor, known as TRIPS (Tera-op, Reliable, Intelligently adaptive Processing System), could be used to accelerate industrial, consumer and scientific computing. Professors Stephen Keckler, Doug Burger and Kathryn McKinley have been working on underlying technology that culminated in the TRIPS prototype for the past seven years. Their research team designed and built the hardware prototype chips and the software that runs on the chips.
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RE[4]: Dataflow execution
by tdemj on Wed 25th Apr 2007 16:45 UTC in reply to "RE[3]: Dataflow execution"
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That's exactly what I was thinking too, an FPGA, except one that's reprogrammable a million times a second. It looks like each instruction is a mini circuit, executing code directly in hardware. This would be ideal for image, audio and signal processing - it would beat traditional DSPs.

I'm fairly confident that it's possible to write compilers for such a processor. It just has to analyze the dataflow, and design an ever changing circuit. You could execute entire loops in hardware.

Binary compatibility is not an issue these days, when the world is moving to the virtual machine direction. The compiler can be executed at runtime.

Multitasking wouldn't be an issue. If you have 1024 execution units in an array, you can choose to run dozens of tasks, or fully utilize the entire processor to run a single task at an unprecedented speed. Just imagine that you could download an entire neural network to a TRIPS. Now that's parallel processing!

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