Linked by Thom Holwerda on Wed 31st Oct 2007 14:14 UTC, submitted by Dorka
Intel Intel announced today its line of Itanium products for high-end computing servers. Codename Montvale, the chip is an update to Montecito, the Dual-Core Itanium 2 chip which was launched in July last year, Eddie Toh, regional platform marketing manager of Server Platforms Group for Asia-Pacific at Intel, told ZDNet Asia in an interview on Monday.
Permalink for comment 282185
To read all comments associated with this story, please click here.
RE[4]: I can't believe it...
by nick on Thu 1st Nov 2007 04:41 UTC in reply to "RE[3]: I can't believe it..."
Member since:

Information is on wikipedia, as for why?

MMIO? As in memory mapped IO? Intel x86 CPUs have had this capability for a long time. Seeing as all their memory traffic goes through a discrete northbridge chip anyway, the main thing for the actual CPU to provide is really the memory access policies to make it useful.

It helps if you actually know what you're talking about, when you're making assertions.

look at the latest conversations regarding SCSI/OpenSolaris and how the lack of MMIO (when compared to SPARC) makes driver writing that little bit more difficult.

I have a feeling you read some thread where people were talking about IOMMUs. Completely different, but again due to the nature of Intel's CPUs, IOMMUs are more a function of the platform. And that's true of ia64 too, Itanium CPUs don't have IOMMUs either. While IBM xseries x86 systems do have IOMMUs, and on the other hand, SGI's ia64 Altix systems don't.

It would also improve performance, especially on very large configurations.

Possible, but not always the case. If devices are capable, there is no big for an IOMMU to improve performance since the days of DAC over slow old 32 bit PCI are over. (Actually using it could reduce performance due to translation management overhead). Memory protection is the main reason for the renewed interest recently.

Reply Parent Score: 2