Linked by Thom Holwerda on Wed 31st Oct 2007 14:14 UTC, submitted by Dorka
Intel Intel announced today its line of Itanium products for high-end computing servers. Codename Montvale, the chip is an update to Montecito, the Dual-Core Itanium 2 chip which was launched in July last year, Eddie Toh, regional platform marketing manager of Server Platforms Group for Asia-Pacific at Intel, told ZDNet Asia in an interview on Monday.
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RE[6]: a view details
by rayiner on Thu 1st Nov 2007 20:38 UTC in reply to "RE[5]: a view details"
rayiner
Member since:
2005-07-06

The problem with your analysis is that the IA64 ISA was never intended to be visible to the programmer, ironically neither did most RISC architectures.

VLIW isn't just an ISA design, it's an implementation strategy. The whole point of VLIW is to move complexity from the implementation to the compiler by creating a suitable ISA that exposes implementation details to the software. It is not just an abstract interface for programming the micro-architecture --- such a statement goes against the very idea of VLIW. The purpose of EPIC specifically goes further. It uses VLIW principles to allow an implementation that can take advantage of large amounts of static ILP (in an in-order design no less!). None IA64 makes any sense without keeping in mind that design goal.

There is nothing inherent to VLIW, RISC, or CISC for that matter that makes them more or less suited for general purpose computing.

The idea of depending on the compiler to discover ILP is what makes VLIW unsuitable for general purpose computing. The compiler technology isn't there, and even if it were, nobody wants to recompile their code every year anyway!

The compiler/VLIW pipeline combination seems to perform fairly decently as far as the Itanium2 is concerned

No, it doesn't. I2 performs "fairly decently" only on heavily optimized code run through heroic compilers. That's where my point about the software ecosystem comes in. When you're targeting the "general purpose" market (high volumes, wide distribution), a couple of heroic C and FORTRAN compilers and the necessity of recompiling your software for each new iteration of the architecture doesn't cut it.

A major lesson of the success of x86 processors in the last decade is that a good architecture is one that's easy to generate code for, and one that runs existing code adequately (eg: the Pentium Pro's poor performance on 16-bit code drastically curtailed its success in the mainstream). IA64 falls down very badly on this criterion.

Where as the IA64 was always intended to stay in the high range of things.

This is a retro-active rationalization. IA64 was intended to eventually replace x86. It doesn't make sense in any other context. You don't go to all the trouble of creating a fairly radical new architecture, one that you know is going to require a huge long-term investment into developing new software technologies especially for it, without expecting it to be very broadly applicable. IA64 was created because Intel thought that EPIC and VLIW would allow them to make better processors across its range of markets. It did not succeed in that regard.

Now, the Itanium series of processors was very likely always intended for the high range of things, but IA64 as an ISA wasn't. However, as it has become obvious that IA64's ideas of magic compilers hasn't panned out, people have realized that the sole redeeming qualities of the platform lie in high-end features of the Itanium implementation that have nothing to do with the ISA. As such, IA64 is de-facto relegated to the high-end, but not by choice!

Thus saying things like the only reason why IA64 won't die is because Intel and HP are poring wads of money into it, is a bit disingenuous

That's not what I said. I said that IA64 won't die because Intel has _already_ poured a wad of money into it, and is now looking to recoup whatever it can. In contrast, HP let Alpha die, because it had no such motivating drive.

As far as Intel is concerned, they get to recoup a lot of their investment. A big deal of the tracing, value prediction and static analysis technology from the IA64 compilers are making their way into their x86 compilers.

No they're not. The IA64 compiler technology is virtually useless to everyone else. They can get you a few percent here and there, but the complexity just isn't worth it. It's particularly stupid because nobody wants to do static FORTRAN compilers anymore anyway. The future, in the general purpose market, is in JIT's that have to do code-gen in 100ms on the fly, and all of the stuff developed for IA64 is just too damn expensive for that.

At the end of the day, if they spent $1 billion to kill off and carve $10 billion worth from competitors

First, Intel's investment into Itanium was more like $10 billion, and second, that's another retro-active rationalization. If the real goal was to kill off a bunch of RISC competitors, Intel could have achieved that at much lower cost and _much_ lower risk by creating a traditional RISC architecture. VLIW, EPIC, none of that stuff was necessary from a strictly marketing standpoint.

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