Linked by Thom Holwerda on Wed 10th Feb 2010 16:09 UTC, submitted by SReilly
Hardware, Embedded Systems "In years past, an ISSCC presentation on a new processor would consist of detailed discussion of the chip's microarchitecture (pipeline, instruction fetch and decode, execution units, etc.), along with at least one shot of a floorplan that marked out the location of major functional blocks (the decoder, the floating-point unit, the load-store unit, etc.). This year's ISSCC is well into the many-core era, though, and with single-chip core counts ranging from six to 16, the only elements you're likely to see in a floorplan like the two below are cores, interfaces, and switches. Most of the discussion focuses on power-related arcana, but most folks are interested in the chips themselves. In this short article, I'll walk you through the floorplan of two chips with similar transistor counts - the Sun's Niagara 3 and IBM's POWER7."
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@Kebbabert
by spanglywires on Mon 15th Feb 2010 21:02 UTC
spanglywires
Member since:
2006-10-23

Please quit spamming *every* site I read ;)

Yes, Niagara is pretty fantastic, and yes, IBM Power is not all it's exaggerated to be, but I am so thoroughly bored of your constant provocation of everyone everywhere aout everything!

We *know* Siebel and RAC can run faster on Niagara, but its still not quite the all-round performer it needs to be. So long as Oracle|Sun hopefully have the balance of cost/quality/performance about right we'll have these lovely Niagara toys around for years to come, and that speaks far clearer than any ramblings about $'s vs benchmarks.

Now, as a Sun-shiner as some like to call us, I've got to say Power7 is quite impressive. It looks to correct the majority of the flaws in Power6 which certainly seems a dud to me. It (Power6) is a number cruncher, but when you carve it up into lpars you pay a huge price for its in-order execution, especially when you max the RAM which means the memory clock drops.

The design of Power7 where it steals the turbo core feature from Nehalem or branch it into a small pool of threads is a good flexible trade off that should suit the workloads of the next few years.

Sun|Oracle needs a big box like this, whether it will be the Venus APL2 stuff, or whether its a monster Niagara system built up into a huge rack cluster like the E15k/E25k's were remains to be seen, but suffice to say this monster will be top of the list in Larry's lab now!

Take a look at it all objectively. For IBM its the first chip since Power3 in the SP's and RS64's thats got some true merit and dare I say it - thoughtful design behind it. For Sun, theres a lot of damage to undo, and hopefully theres enough of the smart people left to apply that innovation Sun is famous for.

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