Linked by Hadrien Grasland on Thu 19th May 2011 21:31 UTC
Hardware, Embedded Systems Having read the feedback resulting from my previous post on interrupts (itself resulting from an earlier OSnews Asks item on the subject), I've had a look at the way interrupts work on PowerPC v2.02, SPARC v9, Alpha and IA-64 (Itanium), and contribute this back to anyone who's interested (or willing to report any blatant flaw found in my posts). I've also tried to rework a bit my interrupt handling model to make it significantly clearer and have it look more like a design doc and less like a code draft.
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RE: PowerPC v2 ?
by Neolander on Fri 20th May 2011 11:43 UTC in reply to "PowerPC v2 ?"
Neolander
Member since:
2010-03-08

I'll check once I'm at home and have my stack of manuals at hand, but I think there was something like "PowerPC v2.1" written on the first page of the manual, so I assumed that this architecture had, like ARM, seen several revisions.

Edited 2011-05-20 11:47 UTC

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