Linked by Hadrien Grasland on Thu 19th May 2011 21:31 UTC
Hardware, Embedded Systems Having read the feedback resulting from my previous post on interrupts (itself resulting from an earlier OSnews Asks item on the subject), I've had a look at the way interrupts work on PowerPC v2.02, SPARC v9, Alpha and IA-64 (Itanium), and contribute this back to anyone who's interested (or willing to report any blatant flaw found in my posts). I've also tried to rework a bit my interrupt handling model to make it significantly clearer and have it look more like a design doc and less like a code draft.
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RE[5]: Locking benchmarks
by jal_ on Tue 24th May 2011 16:15 UTC in reply to "RE[4]: Locking benchmarks"
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Thanks for this even more elaborate answer. I think all my questions have been answered, though it would be difficult to envision a programming model that, with all the callbacks, would make it clear how the program flow goes. Some 4GL maybe... Food for thought!

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