Linked by Thom Holwerda on Fri 28th Jul 2017 19:49 UTC
AMD

So far all the products launched with Zen have aimed at the upper echelons of the PC market, covering mainstream, enthusiasts and enterprise customers - areas with high average selling prices to which a significant number of column inches are written. But the volume segment, key for metrics such as market share, are in the entry level products. So far the AMD Zen core, and the octo-core Zeppelin silicon design, has been battling on the high-end. With Ryzen 3, it comes to play in the budget market.

AnandTech's review and benchmarks of the new low-end Ryzen 3 processors.

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RE[6]: Comment by raom
by Treza on Sat 29th Jul 2017 22:09 UTC in reply to "RE[5]: Comment by raom"
Treza
Member since:
2006-01-11

Then why is EVERY x86/x86-64 internally a RISC processor?


I'm getting tired of this nonsense.

There is no "internal RISC processor". There is microcode. Microinstructions do not make an instruction set, Intel CPUs used to execute micro-ops sequentially (8086...80386), now it is pipelined, out of order, speculative, ... but this do not make a RISC.

RISC/CISC is about instruction sets, and one of the ideas behind RISC was discarding the microcode and replacing it with a straightforward instruction decoder.

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