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I think most people out there don't realize how FPGAs works.

I'll try to explain, and sorry for my elementary school english.

FPGAs are essentially made of two things :
- logic resources : for example :
- simple D flip-flop
- Embedded memory of a few kilobits
- Full multiplier
- "Hard IP" Microprocessor ( ARM for Altera, PowerPC for Xilinx )
- Programmable interconnects.

The "logic resources" can be as fast as in ASICs as common RAM based FPGA uses a standard hi speed logic process.

The "programmable interconnect" are slower than in ASICs as they are basically replaced with wires.
Some cheap ASICs are called "prediffused" as the "logic cells" are made once for all in silicon and customers only need to pay for metal layers masks.
Some FPGAs uses AntiFuse OTP ( one time programming ) technologies ( Actel ) that are quite like prediffused ASICs because the fuses are made on polysilicium interconnect layers.

Highest density FPGA are RAM based, they download their configuration at power up into RAM cells that command the switches of the "programmable interconnections" . It is a quite cheap technology as it is based on standard processes. ( for example, Xilinx uses the 90nm process of IBM factories to build their next gen FPGAs ). Usually, these FPGAs are not reprogrammed after power up but many have had the idea of using that behaviour ( that can be a major problem as these FPGAs need time to become fully operational, say, up to 1 second ) to do dynamic reconfiguration.

There are two kind of possible reconfigurations schemes :
- Change memory elements : Constant tables, registers contents, microcode.
It's quite easy to do that.
- Change the behaviour.
It's an awful mess because common FPGAs are not geared for partial reconfiguration. In software, you can swap a DLL without recompiling your app, in a FPGA, usually, changing a single D flipflop may break the entire design ( altough signifiant improvement are being made now ). FPGA compilers are very slow and if the partial reconfiguration is error prone, it may introduce real shortcuts inside the chip ( whereas, in general, no bug ridden software can break hardware :-).
Another problem is that if you need to reconfigure a signifiant part of the FPGA, it will take much time to download the configuration. The binary efficiency of FPGA fabric code is much lower than common assembly language. The performance gain of the FPGA will be mitigated by the bandwith needed to dynamically transform the FPGA.

The whole point is that you won't expect any performance gain for using a FPGA instead of an ASIC :
- For general purpose processing, a CPU will be faster
- For Signal processing, a DSP would be cheaper ( smaller die ) if it can handle the calculations.
- For some complex stream tasks : Well, what kind of complex stream ? 3D rendering ? A 3D chip will do the job better.

Common desktop CPU take most of their time moving small chunks of memory, swapping registers, pushing/popping from the stack, ... Nothing very streamlineable, nothing that can be efficiently implemented in a VLIW number crunching architecture.

( I've once built a DSP based parallel computer for astronomical data processing. Datas were basically independant and as such connecting together 40 DSP made calculations 39 faster. Basically, there no such speed improvement to expect on your PC )

FPGA vendor do not expect to replace Intel and AMD as big cpu builder. For low end CPUs, they offer soft libraries that can be implemented in the FPGA fabric. For higher performance, they embed hard coded processors ( Xilinx offers up to 4 400MHz PowerPCs in a single FPGA ). For insane performance, get a real CPU.

Finally, high FPGA are becoming quite affordable and anyone can experiment new CPU architecture in his/her garage ( for about $2000 to have a useable board ). Maybe you could find really innovative structures ( Objet oriented CPU, hardware garbage collector, dynamic code and data compression... ), but, once you've patented your brilliant idea, look for cash to burn a real high performance ASIC that will dwarf Intel....

( Another area where FPGA are really exciting is Neural Networks, transforming logic cells into neurons and programmable interconnects into dendrites... )