Linked by Nicholas Blachford on Sun 10th Feb 2002 17:37 UTC
Editorial "This will end up being one of the world's worst investments, I'm afraid," - David House, former Intel chief of corporate strategy said in the early 1990s. I've been fasinated by microprocessors for years and have been following the Merced debacle since back in 1994 when HP and Intel announced they were getting together to make some amazing new technology.
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Several stages in the athlon pipeline is spent on decoding x86 into micro-ops which are Risc like. that way, athlon can run legacy x86 code.

there are like 50+ million athlons out there.

wouldn't it be faster to have a compiler that expose the underlying Athlon Risc engine, reduce the pipline by several stages and hence reducing mispredict penalties?

in other words, the underlying athlon Risc engine has many registers and a shorter pipeline, so why not have a compiler produce code in micro-ops, instead of x86.

it should allow the athlon to run cooler and faster.