posted by Hadrien Grasland on Fri 30th Dec 2011 08:24 UTC
IconIn the world of alternative OS development, portability across multiple architectures is a challenging goal. Sometimes, it may be intrinsically hard to come up with hardware abstractions that work well everywhere, but many times the core problem is one of missing information. Here, I aim at learning more about the way non-x86 architectures deal with CPU IO ports, and in particular how they prevent user-mode software from accessing them.

First, let's start by summing up what I know. IO ports are the conceptually simplest way for computer CPUs to communicate with external hardware in a bidirectional fashion. They work using standard CPU instructions that send and receive fixed-size integers to distant hardware. Unlike with memory-mapped IO, these instructions always work as expected, and aren't moved anarchically by optimizing compilers if you forget a "volatile" keyword somewhere. IO ports are also as standard as communication with external hardware can get, but on the minus side they are probably the slowest IO mechanism available, and using them requires architecture-specific ASM snippets.

On architectures which supports hardware-enforced separation of kernel-mode and user-mode software, every CPU feature which is used to control external hardware must be kept under the control of privileged software, and IO ports are no exception. On x86, this is done by using so-called "IO permission bitmaps", which allows kernel-mode software to control the way other software accesses IO ports at the individual port scale. This hardware feature, which is really nice for microkernel OSs, leads me to ask a first question : How do other architectures restrict user-mode software's access to IO ports ?

Another thing worth noting about x86 IO ports is that they seem to be a thing of the past. For better and worse, x86 has apparently moved to memory-mapped IO, DMA, and nonstandard ("Model-specific") CPU registers nowadays, and all uses which I've found so far for IO ports on this architecture are legacy IBM PC features : 8259 PIC, CMOS, PS/2-compatible keyboards... Which leads me to a second question : What are the main means of communication with external hardware on other architectures ?

Many thanks in advance for your answers.

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