Linked by Thom Holwerda on Sat 8th Apr 2006 18:38 UTC
Hardware, Embedded Systems As expected processor licensor ARM Holdings and Handshake Solutions NV, a Royal Philips Electronics subsidiary, have developed an asynchronous processor based on the ARM9 core. The ARM996HS is thought to be the first commercial clockless processor and is being described as particular suited to use as an automotive microcontroller. Because clockless processors consume zero dynamic power when there is no activity, they can significantly extend battery life compared with clocked equivalents.
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RE[3]: somewhat dubious
by nbs_r on Sun 9th Apr 2006 13:24 UTC in reply to "RE[2]: somewhat dubious"
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A very basic difference between synchronous and asynchronous (here self-timed, I guess) logic is that the first one is polling its inputs at every clock's tick, while the second is strobed by inputs directly (each data signal is a "clock").

So, for asynchronous circuits there is no notion of explicit "stops", "idle states" or "waking up" because these were invented to stop or limit "polling" activity in synchronous circuits. Asynchronous circuits respond to their input events instantly (i.e. a latency depends on processing time only). They are active only when there is something to do and the level of their activity adjusts automatically to the activity of input signals, temperature, supply voltage and process skew. It basically means that (at least for CMOS implementation) you can control the maximum processing power and maximum operating temperature by adjusting the supply voltage _only_. Internal handshaking structures will take care of the signal integrity, synchronisation and providing maximum performance.

So what is the problem about deploing these circuits more widely? There are at least two:
- circuit overhead - present CMOS synchronous circuits are ~2x smaller. Also processes are tuned to synchronous logic architectures. This results in often better performance although the theory says opposite.
- design methodology - synchronous logic is very simple to design. There are numerous problems with VLSI implementation (mostly related to clock and power management) but with time we learned how to cope with that. Again withouta robust design tool-chain, IP macros and support there is no resonable time-to-market what disqualifies asynchronous logic in typical applications.

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