Linked by Thom Holwerda on Sun 16th Apr 2006 15:36 UTC
OSNews, Generic OSes Right in between a car crash and Easter, I knew I had to write a Sunday Eve Column. So here I am, digesting vast quantities of chocolate eggs (and I don't even like chocolate), craving for coffee (for me about as special as breathing), with the goal of explaining to you my, well, obsession with microkernels. Why do I like them? Why do I think the microkernel paradigm is superior to the monolithic one? Read on.
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Brendan
Member since:
2005-11-16

I think the above could be achieved with a solution called 'memory map'. Just like a process has a page map, a software component should also have a memory map, i.e. a range of addresses that it is allowed to access.

Accessing RAM is slow, but accessing several levels of the paging structures and severel levels of "memory map" structures and the final physical RAM location (every time the CPU accesses RAM) would be unbearable. That's why CPUs cache the paging structures (TLB), and that's why they'd need to cache the "memory map structures". If you're going to change the "memory map" structures every time the CPU changes between software components then you'll lose the benefits of this caching and end up with "memory map structure cache" misses.

You might aswell just change the paging structures instead (which is what micro-kernels do)...

Reply Parent Score: 1

Cloudy Member since:
2006-02-15

The trick is to use systems on which the transition between protection domains is assisted by the VM hardware rather than hindered. The PA-RISC VM model, for example, makes transitions between memory protection domains very fast, nearly as fast as procedure calls that don't transition.

This is what hardware designers and OS designers keep missing. The VM system should make accessability and addressability of memory distinct so as implementation of protection domains in this way is cheap.

We at HP tried to convince Intel to do this in Itanium, but I didn't stick around long enough to see if it made it.

Reply Parent Score: 2