Linked by Thom Holwerda on Sat 3rd Jun 2006 16:12 UTC, submitted by anonymous
Morphos In a comment on the Power.org blog, Pieter Van den Abeele wrote that Genesi will be releasing the Open Server Workstation, which will be based on the PowerPC 970 (G5) chip. The system is scheduled for release this month give or take a few weeks, and will cost $1599. Developers can also register for a free workstation.
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RE[5]: g5
by Simba on Mon 5th Jun 2006 14:56 UTC in reply to "RE[4]: g5"
Simba
Member since:
2005-10-08

> Opteron delivers larger L1 cache.

Which is partly to compensate for the fact that the CPU itself doesn 't have enough GPRs.

Reply Parent Score: 1

RE[6]: g5
by encia on Tue 6th Jun 2006 08:26 in reply to "RE[5]: g5"
encia Member since:
2005-11-16

>Which is partly to compensate for the fact that the >CPU itself doesn 't have enough GPRs.

Look up the purpose of "register renaming" hardware tricks in relation ISA limited GPRs.

Reply Parent Score: 1

RE[6]: g5
by encia on Tue 6th Jun 2006 08:40 in reply to "RE[5]: g5"
encia Member since:
2005-11-16

>Which is partly to compensate for the fact that the >CPU itself doesn 't have enough GPRs.

Modern x86 CPUs use more than eight/sixteen GPR internally, that allows them to use several versions of the same GPR. This is called register renaming.

Specfic for K8...
Not visible for the software programmer are eight more 64 bit scratch registers used to store intermediate results for micro code routines.

According to chip-architect.com, Opteron may have upto 96 "renamed registers".

Reply Parent Score: 1

RE[7]: g5
by SamuraiCrow on Wed 7th Jun 2006 03:52 in reply to "RE[6]: g5"
SamuraiCrow Member since:
2005-11-19

Doesn't the Opteron have to be in a special 64-bit native mode that isn't supported by Linux or any other mainstream OS to use all of its registers as general purpose?

Edited 2006-06-07 03:55

Reply Parent Score: 1