Linked by Thom Holwerda on Tue 22nd May 2007 00:15 UTC
IBM IBM finally took the wraps off its much anticipated Power6 microprocessor, which company executives said will double the clock speed of its current Power5 chip, without stretching the power envelope. The Power6 processor, unveiled at an event on May 21 in London, is a dual-core chip with a top clock speed of 4.7GHz, double the 2.3GHz of the Power5+ processors. The new chip also includes 8MB of L2 cache - four times as large as the current Power5 offering - and an internal bandwidth of 300GB per second. Ars' John 'Hannibal' Stokes obviously also has his say.
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Only 4 POWER6 cores are needed to beat the octo Mac. In SPEC2006 that is.

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rayiner Member since:

The Octo Mac comparison is potentially misleading.

The 4.7 GHz Power6 has a SPECint Peak of 21.5, and a SPECint Base of 17.8

The 3.0 GHz Xeon 5160 has a SPECint Peak of 18.1, and a SPECint Base of 17.5

Now, the first thing to keep in mind is that the Peak figures are taken with PGO. PGO is great for SPEC, but almost nobody uses it for anything else. The second thing to keep in mind is that the numbers are taken with XLC and Intel C++, neither of which are relevant to 99% of code out there. The standard OS X compiler is GCC. GCC is much stronger on x86 than on PPC.

Given all that, I'd be very surprised if GCC-compiled code on the Power6 achieved even parity with GCC-compiled code on the Xeon.

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