"A new startup out of MIT emerged from stealth mode today to announce that they're shipping a 64-core processor for the embedded market. The company, called Tilera, was founded by Dr. Anat Agarwal, the MIT professor behind the famous and venerable Raw project on which Tilera's first product, the TILE64 processor, is based. Tilera's director of marketing, Bob Dowd, told Ars that TILE64 represents a "sea change in the computing industry", and the company's CEO isn't shy about pitching the chip as the "first significant new chip architectural development in a decade". So let's take an initial look at what was announced about TILE64 today, with further information to follow as it becomes available."
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Member since:2005-11-10
If anything x86 isn't exactly a great architecture, just "good enough". If you've tried programming it, you know that even 6502 is more elegant.
PPC, ARM, MIPS &c are all excellent architectures which can be programmed highly, highly efficiently by someone who knows what they're doing and isn't clouded by doing things solely the x86 way.
Oh, and modern CPUs like the Core Duo emulate x86 macros down to more a more RISC-like central set. This is how Intel managed to make the jump from the hot, high-power P4's to relatively cooler and lower power Dual Core chips.
Member since:2005-07-06
The Core 2 is actually less RISC-y internally than the P4. The P4 is internally a pure u-op design. The Core 2 caries fused u-ops (eg: mem-op instructions) through much of the frontend of the core.
As for PPC, ARM, and MIPS, one of those three does not belong. MIPS is a great instruction set. PowerPC is poo.
Member since:2005-07-08
Not even close. Intel has been converting from x86 to internal micro operations since the original Pentium more than 10 years ago.
PPC, ARM and RISC aren't in any way more efficient than x86. The ISA is just like and API and in no way reflects efficiency. A lot of issues with X86 are easily fixed by clever hardware design.
Yeah it's not as elegant as PPC or MIPS but it's also a lot older.
Member since:
2005-09-14
The article indicates it's a MIPS derivative.