Linked by Thom Holwerda on Tue 27th Nov 2007 22:54 UTC, submitted by teigetje
RISC OS "The two opposing corners of RISC OS have apparently agreed to join forces and jointly coordinate development of the OS. RISCOS Ltd, who produce RISC OS 4 and 6, and RISC OS Open, who are overseeing RISC OS 5 development, promised this week to, effectively, chat to each other over a coffee."
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RE[3]: yay
by Ishan on Wed 28th Nov 2007 10:53 UTC in reply to "RE[2]: yay"
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AMD use CISC now I think. I remember them using RISC internaly with a CISC interpreter in the past.

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RE[4]: yay
by kaiwai on Wed 28th Nov 2007 16:38 in reply to "RE[3]: yay"
kaiwai Member since:

1) RISC isn't an instruction set but a concept; the ISA itself are things like SPARC, POWER, MIPS and so forth, which implement in their respective ISA's in a RISC manner.

2) AMD bought out an MIPS processor company which created embedded processor designs, IIRC the name was called Alchemy. The last time I had a check it was pretty good.

3) Intel used to sell an ARM varient called Xscale, but have since sold it off to Marvell.

4) Intel have decided that x86 is the future, they've already demonstrated a super-duper low powered chip based on the ISA which delivers lower power than traditional RISC based processors.

5) Both Intel and AMD have RISC cores internally, but then again, there is a major difference now between what the ISA is and what the microarchitecture is.

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