Linked by David Adams on Fri 9th May 2008 21:44 UTC
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Yeh, about 15 years ago I worked on a medium size DSP chip for HP before it split off into Agilent or whatever and long before Carly came on board.
I really liked working with those guys and I always wished I could have worked there in its heyday (early 90s and before). Of course I am saddened by the demise of its position, I thought they were pretty much out of the chip design game so I am not sure why they would even have a R/D lab anymore. Still it's their business to work on whatever interests them.






Member since:
2005-07-08
Well I am just an old fashioned chip designer that learnt my RCLs almost 40 years ago and chip design a little later and I have seen a lot of huge claims that never pass the research to market test.
I did some research elsewhere on this and I understand the hysteresis effect to be not so difficult to understand. It really looks like an intersection of 2 wires at a titanium dioxide interface where oxygen atoms depleted in the above layer give a certain resistance to appear in one wire. As current flows in the device, oxygens atoms freely move through the interface and change the materials effective resistance giving it hysteresis. The oxygen atoms seem to be able to move back again as the current is changed making it perhaps more practical to write and store changing 0,1,0s.
I really don't buy into the hyperbole on this.
The effect is not unlike many other non linear effects seen when current in a device causes charge to flow through an oxide interface trapping charge there which then causes threshold changes in the transistor channel and therefore has a memrister like effect. The humble EEPROM cell has had this effect for for 40 odd years and the Flash cell is a refinement of that. The catch there is that it is a mostly one way effect that requires far more effort and time to reverse or bulk erase.
As I said before in my previous post, I would hold out far more promise in graphene transistors and other nano materials. See the continuous stream of articles on sciencedaily or pysorg .com regarding nano tech.
In the end, memory technology is constrained by both the device physics as well as the patterning of intersecting wires and that is where we are limited right now.
Now on another interesting development another team has found away to recook a patterned chip so that the somewhat irregular lumpy wires automatically straighten themselves out only on their surface so that they become about 5x more straight and tall. This would allow chip features to decrease significantly using a special sub ns UV laser pulse to fry just the atomic surfaces of the wires (sort of like Lasik for nano wires).
My real test for whether this a 4th effect is if it can be found in the most simple devices in nature. R,L,C occurs in the most simple arrangement of wires and have been understood for well over a hundred years. A 4th effect that can only be demonstrated at the nano scale in a lab and only shows hysteresis is hardly in the same camp. Hysteresis has also been around for ever too, this hardly requires text books to be rewritten either.