Linked by Flatland_Spider on Wed 8th Oct 2008 12:41 UTC
AMD AMD finally fleshed out the "Asset Smart" strategy it has been talking about since, at least, last December. The result: AMD is now fabless.
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RE: Good Move But Not Good Enough
by rajj on Wed 8th Oct 2008 18:22 UTC in reply to "Good Move But Not Good Enough"
Member since:

Savain. Seriously. Stop spamming every thread/CPU related article on the net with your BS.

Reply Parent Score: 3

TaterSalad Member since:

I can't stop you but I can mod you down so others aren't subjected to your posts.

Reply Parent Score: 4

rajj Member since:

Do I look like a legislator? How and in what way am I encroaching upon your liberty? Screaming, "free-speech" at the top of your lungs doesn't save you from public ridicule.

Further, I didn't mod you down either.

Reply Parent Score: 1

evangs Member since:

I've said this before, and I'll say this again. Even though you fancy yourself some sort of 21st century Galileo Galilei, in reality you're a lot closer to Frank Chu.

So stop it, please.

Reply Parent Score: 2

transputer_guy Member since:

Okay, I was curious to see what it is that makes you and others think Savain is babbing on about that you call BS.

Well as a veteran hardware software engineer, I would say most of the comments against him are pathetic. No wonder OSNews has gotten so utterly boring recently, nobody knows anything about the past and what will have to be reinvented again. On his blog he appears to have reinvented what we in the hardware (VLSI) industry have been doing for 4+ decades, expressing concurrency in a more hardware like fashion using event driven cycle simulation. I still have to fathom if there is anything else there beyond what I am familiar with. If everyone started modding me off to <0, I'd probably get pissed too and walk away.

Two decades ago there was a parallel processor that was easy to write concurrent programs for and map onto any number of available communicating processors. Typically 1-1000 cores were used in various apps with little change to the code, but those were 4KB/chip days and the apps were very much DSP like. The hardware is long gone but the || model still works in CSP based languages that can run on x86, not sure how well it exploits multiple x86 cores though. The model is very similar to hardware design languages, model processes as communicating hardware objects. I could say APL, Occam, ADA, various CSP languages, Verilog, VHDL, Matlab, even Haskell etc all fall into a hardware -software continuum. All of those have been used to express hardware designs which is inherently parallel.

He is right about one thing though, todays x86 really does suck in so many ways, it is very fast in some things like Video Codecs (extreme cache locality) but in practice is many orders slower when dealing with highly unordered memory requests. It all boils down to that pesky Memory Wall, true random accesses are now 1000s times slower than the aggregate datapaths. Going to 64b address space and having many cores only worsens this. What is the point of having 4 or more cores when even the 1st one is under utilized due to this wall.

One can remedy this somewhat by starting with a memory system using a low latency RL DRAM from Micron that is much closer in performance to the processor cycle speed. The penalty is that atleast 40 threads must be used per processor to hide the remaining memory latency, in effect trading a giant Memory Wall for a modest Thread Wall, and the memory costs more too. On this kind of processor, I would have no trouble partitioning the graphic compute intensive parts of my apps onto large numbers of threads. I really have no idea how to exploit todays hardware anymore. Even moving data around in memory is highly unpredicable, longer blocks take far more cycles per word. In the MVC type of app, only the View part is usually compute intensive but also easy to tile.

So what thesis do you propose to make parallel computing run well on the next AMD/Intel masterpiece? Enlighten me please.

As for AMD going fabless, that is sad, end of an era, as Jerry Sanders used to say so often, real men have fabs. I did work for one of AMDs parts a long time ago.

Reply Parent Score: 2

rajj Member since:

Savain is a well known internet troll that routinely antagonizes the Erlang people and spams links to his blog everywhere. He also attacks well established physics theories based purely upon evidence from the bible, personal inability to believe and other such non-sense. To top it all off, he basically calls Babbage and Turing idiots routinely (not to mention everyone else). The real kicker is that he will register multiple accounts to reply to himself in praise.

His COSA idea is just a finite state machine. I don't see anything revolutionary about it. The problem with FSMs is that they don't scale well. The number of states and transitions between states quickly grows out of control to the point that nobody can understand it. The reason why software is modeled the way it is now is because PEOPLE can understand it.

Reply Parent Score: 5

Sophotect Member since:

Sort of a Transputerfarm on a Chip:

Though it has other targets than the usual computing.

Btw. i have a Sata->Atapi->USB-Controller in an external Disk, which is somehow related to one of their former Chips. Has never let me down so far, FORTH chugging along at its best :-)

Reply Parent Score: 1