Linked by Thom Holwerda on Sat 7th Nov 2009 14:33 UTC, submitted by J!NX
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I think Xen and whatnot have been using/expecting tagged TLBs for a while now.
AMD64 has had tagged TLB literally from the get go. Pacifica and whatever it is Intel names their hypervisor technology have been around for a while too and expanded on that. I think you may be referring to things like nested page tables and such.
Further, x86 allowed for software management of certain TLB functions, as to make a more informed request for a TLB flush.






Member since:
2009-10-04
Many processor architectures such as MIPS have had tagged TLBs for a long time, but x86 has not. Intel and AMD have only recently started introducing tagged TLBs, any they are not fully used yet.