Linked by Thom Holwerda on Thu 28th Jan 2010 20:21 UTC
Hardware, Embedded Systems And yet another item on the iPad? Are we serious? Yes, we are, since this one is about something that even geeks who aren't interested in the iPad itself should find intriguing. Steve Jobs said yesterday that the iPad is powered by an Apple A4 processor, but contrary to what many seem to think - it wasn't designed in-house at all.
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RE[5]: ARM
by lemur2 on Sat 30th Jan 2010 14:01 UTC in reply to "RE[4]: ARM"
lemur2
Member since:
2007-02-17

A lot of people do not seem to understand that the "reduced" in RISC refers to the cycles per instruction, not the number of instructions.

Some of the early RISC designs included more instructions in their ISA than their CISC counterparts.


This has nothing to do with the point made in the post to which you responded.

The Loongson CPU includes a lot of support in terms of extra macro-instructions in order to assist with x86 emulation, and still it achieves only 70% of native performance.

ARM does not include any such support at all, so x86 must be entirely emulated in software.

Hence, the performance of a low-power ARM chip running x86 binaries under emulation will be dismal. Hence, copies of x86 binary executable applications will be utterly useless the Windows on ARM.

Hence, Windows on ARM will not have the benefit of the existing corpus of x86 Windows applications.

That was the point.

Reply Parent Score: 2

RE[6]: ARM
by tylerdurden on Sat 30th Jan 2010 20:29 in reply to "RE[5]: ARM"
tylerdurden Member since:
2009-03-17

You were using an arbitrary definition of RISC, and I was just simply letting you know that the "reduced" in RISC does not refer to the number of instructions in a specific ISA/microarchitecture.

I wasn't refuting the gist of your point, I was simply making a small correction. Reading and comprehension and all that jazz...

Reply Parent Score: 2

RE[7]: ARM
by lemur2 on Sun 31st Jan 2010 02:37 in reply to "RE[6]: ARM"
lemur2 Member since:
2007-02-17

You were using an arbitrary definition of RISC, and I was just simply letting you know that the "reduced" in RISC does not refer to the number of instructions in a specific ISA/microarchitecture.

I wasn't refuting the gist of your point, I was simply making a small correction. Reading and comprehension and all that jazz...


I understand completely that a "Reduced Instruction Set Computer" involves instructions that "do less", as opposed to a lesser number of instructions.

http://en.wikipedia.org/wiki/Reduced_Instruction_Set_Computer
The acronym RISC (pronounced as risk), for reduced instruction set computer, represents a CPU design strategy emphasizing the insight that simplified instructions that "do less" may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly.


Hence the need to have additional macro-instructions (that is, more-complex instructions built up from a short sequence of simpler instructions) in the Loongson CPU in order to better emulate a Complex Instruction Set Computer (CISC) which is an x86 machine.

http://en.wikipedia.org/wiki/Complex_Instruction_Set_Computer

So? What did I say that was in any way counter-indicative of this, that caused you to interject your know-all post?

None of this in any way, one way or another, has any bearing whatsoever on the point of discussion ... which was that Windows on ARM makes no sense because the attraction of Windows lies only in the large corpus of existing binary-only x86 programs for Windows that people want to run.

People still won't be able to run x86 binary applications on an ARM machine, even if they were duped into buying a "Windows on ARM" OS machine.

Edited 2010-01-31 02:38 UTC

Reply Parent Score: 2