Linked by David Adams on Wed 4th Aug 2010 18:28 UTC, submitted by estherschindler
Hardware, Embedded Systems Anyone contemplating a new computer purchase (for personal use or business) is confronted with new (and confusing) hardware choices. Intel and AMD have done their best to differentiate the x86 architecture as much as possible while retaining compatibility between the two CPUs, but the differences between the two are growing. One key differentiator is hyperthreading; Intel does it, AMD does not. This article explains what that really means, with particular attention to the way different server OSes take advantage (or don't). Plenty of meaty tech stuff.
Thread beginning with comment 435423
To read all comments associated with this story, please click here.
Uhm...
by Panajev on Wed 4th Aug 2010 19:59 UTC
Panajev
Member since:
2008-01-09

Every CPU core has what’s called a pipeline. Think of pipelines as the stages in an assembly line, except here the process is the assembly of an application task. At some point, the pipeline may stall. It has to wait for data, or for another hardware component in the computer, whatever. We’re not talking about a hung application; this is a delay of a few milliseconds while data is fetched from RAM. Still, other threads have to wait in a non-hyperthreaded pipeline, so it looks like:

thread1— thread1— (delay)— thread1—- thread2— (delay)— thread2— thread3— thread3— thread3—

With hyperthreading, when the core’s execution pipeline stalls, the core begins to execute another program that’s waiting to run. Mind you, the first thread is not stopped. If it gets the data it wants, it resumes execution as well.

thread1— thread1— thread2— thread2— thread1— thread2— thread1— thread2— thread2—


This is not HT, this is describing SoE (Switch on Event) Multi-Threading where you switch thread of execution when you hit a stall (like a cache miss).

HT, or SMT (Simultaneous Multi-Threading), is about having more than one active thread in the pipeline doing work: in some implementations you do issue instructions from more than one thread (in Pentium 4's SMT instructions in the Trace cache [instructions already decoded] were tagged with the Thread ID).

SMT, as far as I know, is about this (at least the one Intel uses with HyperThreading):

say you have a CPU which can execute 4 instructions at a time and your main thread has only 1 instruction for your to issue at that time... is it better to just run 3 other NOP's (nothing is executed) or to seek work from another thread and issue instructions from it?

Edited 2010-08-04 20:00 UTC

Reply Score: 3