MIPS $99 Tablet is First Ice Cream Sandwich Tablet
Linked by Thom Holwerda on Mon 5th Dec 2011 22:48 UTC
PDAs, Cellphones, Wireless Cheap Android tablets are all over the place, and generally not any good. They often have resistive touch screens instead of capacitive ones, are slow, or have no access to the Android Market. For Ice Cream Sandwich, MIPS Technologies is trotting out its existing Honeycomb tablet - which, you guessed it, uses a MIPS processor - licensed to Ainovo. For some reason, that makes this $99 tablet with capacitive screen kind of interesting.
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RE: MIPS!
by renox on Tue 6th Dec 2011 16:07 UTC in reply to "MIPS!"
renox
Member since:
2005-07-06

I also prefer MIPS ISA because it can trap on integer overflow which is nice for efficient Ada compilation.

But unfortunately nearly nobody use a language with this (nice) behaviour instead of stupid C/C++ or Java's behaviour on integer overflow, so it doesn't really matter: both ISAs are quite nice, much better than x86 anyway.

Reply Parent Score: 4

RE[2]: MIPS!
by Alfman on Tue 6th Dec 2011 17:33 in reply to "RE: MIPS!"
Alfman Member since:
2011-01-28

renox,

"I also prefer MIPS ISA because it can trap on integer overflow which is nice for efficient Ada compilation. "

You may be right about mips handling overflow better than x86, but I actually don't mind the way the x86 does it.

ADD [edi], dword 5 # cause overflow
JO xyz # optionally handle overflow
INTO # generate an interrupt on overflow
ADC [edi+4], dword 0 # add carry
CMOVO [edi], ... # clip the range
# do nothing, modulo arithmetic is often desirable.


"But unfortunately nearly nobody use a language with this (nice) behaviour instead of stupid C/C++ or Java's behaviour on integer overflow, so it doesn't really matter"


I share the same gripe of the C language. It offers no way to use or act upon the overflow, leading to less efficient algorithms.

Also, I think modulo arithmetic should be made explicit. Languages like C/Java that implicitly discard overflow information lead to bugs regardless of architecture. New languages should automatically assert errors on overflow unless told to do otherwise.

Reply Parent Score: 2

RE[3]: MIPS!
by renox on Wed 7th Dec 2011 09:35 in reply to "RE[2]: MIPS!"
renox Member since:
2005-07-06

You may be right about mips handling overflow better than x86, but I actually don't mind the way the x86 does it.
Uh? MIPS has two version of integer operation: ADD/ADDU, SUB/SUBU (one which trap on overflow, one which doesn't and corresponds to modulo operation) (not sure about multiplication and division though), so the big thing here is that there is nearly no difference in performance between "modulo" computations and "trap on overflow" computations(*) which isn't the same with other ISA.

*: not 100% true even if both operations have the same performance because "trap on overflow" allow less reorganization than modulo arithmetic.

Reply Parent Score: 2

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