Linked by Thom Holwerda on Tue 10th Sep 2013 18:25 UTC
Apple Apple's event is going on right now - and most of the new stuff already leaked weeks and months ahead of time. So, we're getting an iPhone 5S, an iPhone 5C, and iOS7 will be available later this month. I like the design of the 5C more than of the 5S; it's more playful, colourful - harking back to the coloured iMacs and PowerMac G3s. Too bad it doesn't come in red.

The fingerprint sensor in the 5S is interesting, but I wonder how accurate it will be in the real world; on top of that, with all the NSA news, I'm not particularly keen on Apple reading my fingerprint all the time. Supposedly, applications don't have access to it and it's not stored in the cloud, but I have little to no trust for companies.

The biggest news for me is the fact that the iPhone 5S has a new chip - the A7 - which has the honour of being the first 64bit chip inside a smartphone. iOS7 and first party Apple applications are all 64bit, and Xcode obviously supports it. While this obviously future-proofs the platform for more RAM, I wonder what other motives are involved here. ARM desktops and laptops, perhaps?

I doubt 64bit will provide much benefit today, but you have to hand it to Apple: at least they're done with the transition before it's even needed.

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RE[2]: Coprocessor
by Neolander on Wed 11th Sep 2013 20:27 UTC in reply to "RE: Coprocessor"
Member since:

"This idea of putting a low-power Mx ARM processor alongside an Ax "main" processor, so as to save battery in periods of low activity, sounds quite a bit familiar. Can't tell where I have seen it before though... Perhaps it was an ARM reference design or something like that."

The M7 is not a low-power general purpose core - it is an ASIC that performs only a few specific functions. Similar to the 2 "extra" cores in the X8 on the Moto X (although on that device the ASIC is for different stuff, specifically for voice recognition in that example). In either case, the additional cores are processors, but they are not general purpose processors, and they are generally managed in completely difference power domains (they are kept on almost all the time).

I see, thanks for the clarification ! I did think this was just a low-performance, power-efficient "extra core", as in Tegra 3, rather than special-purpose silicon.

Edited 2013-09-11 20:33 UTC

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