Linked by Thom Holwerda on Wed 3rd Jan 2018 00:42 UTC
Intel

A fundamental design flaw in Intel's processor chips has forced a significant redesign of the Linux and Windows kernels to defang the chip-level security bug.

Programmers are scrambling to overhaul the open-source Linux kernel's virtual memory system. Meanwhile, Microsoft is expected to publicly introduce the necessary changes to its Windows operating system in an upcoming Patch Tuesday: these changes were seeded to beta testers running fast-ring Windows Insider builds in November and December.

Crucially, these updates to both Linux and Windows will incur a performance hit on Intel products. The effects are still being benchmarked, however we're looking at a ballpark figure of five to 30 per cent slow down, depending on the task and the processor model. More recent Intel chips have features - such as PCID - to reduce the performance hit.

That's one hell of a bug.

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Affects...
by BushLin on Wed 3rd Jan 2018 01:03 UTC
BushLin
Member since:
2011-01-26

From the article, quoting a developer.
"There is presently an embargoed security bug impacting apparently all contemporary [Intel] CPU architectures that implement virtual memory..."

Maybe this is lost in translation but I understood the 286 to introduce Virtual Memory so this presumably affects every Intel CPU made since the 1970s? Yikes

Reply Score: 3

RE: Affects...
by dnebdal on Wed 3rd Jan 2018 01:25 in reply to "Affects..."
dnebdal Member since:
2008-08-27

From the article, quoting a developer.
"There is presently an embargoed security bug impacting apparently all contemporary [Intel] CPU architectures that implement virtual memory..."

Maybe this is lost in translation but I understood the 286 to introduce Virtual Memory so this presumably affects every Intel CPU made since the 1970s? Yikes


AMD made an LKML post about this, explaining in more detail what sort of bug this is and that they're not vulnerable.

If I understand it correctly (big if), the problem is in the way intel CPUs do speculative execution. Apparently, the speculative branches don't fully respect memory protection, and someone has found a way to turn that into real-world effects. It seems to have been surprising that this was possible.

LKML link: https://lkml.org/lkml/2017/12/27/2

Edited 2018-01-03 01:29 UTC

Reply Parent Score: 9

RE[2]: Affects...
by BushLin on Wed 3rd Jan 2018 01:30 in reply to "RE: Affects..."
BushLin Member since:
2011-01-26

Was just about to edit, yes; so just every Intel x86 from the Pentium Pro onwards, not so bad. ;)

Edited 2018-01-03 01:41 UTC

Reply Parent Score: 7

RE: Affects...
by bhtooefr on Wed 3rd Jan 2018 01:30 in reply to "Affects..."
bhtooefr Member since:
2009-02-19

Contemporary CPUs, though, and it's implied that it's related to speculative execution (in the old definition where it meant branch prediction and executing ahead of a stall).

That means 286, 386, and 486 cannot be affected, as they don't have branch prediction - they just stall on branches where the available data isn't present.

P5 Pentium and Bonnell Atom could be affected, but being in-order execution, are less likely to be affected even if the bug is present, they can't get as far.

And, the major changes to the memory model, AFAIK, were 286 (added segmented MMU), 386 (32-bit MMU with flat addressing), P6 (36-bit segmentation added to MMU), Dothan (NX), Prescott (hackish 40-bit EM64T implementation), and Core 2 (full 48-bit, IIRC, EM64T implementation).

Here's my guesses as far as where the bug would've likely been introduced:

* P6 (Pentium Pro) - if that's the case, Pentium 4 and all Atoms/Atom-derived CPUs are likely unaffected, as they were separate clean-sheet redesigns (although elements were exchanged between designs)
* Dothan Pentium M - if that's the case, Prescott Pentium 4s are possibly unaffected, Atoms/Atom-derived CPUs are likely unaffected, pre-Prescott Pentium 4s are almost certainly unaffected
* Prescott Pentium 4 - if that's the case, then everything with NX support or everything with AMD64 support is likely affected (it wouldn't be a big deal if only some old P4s were affected, after all, which would mean that some design reuse from P4 to later CPUs happened in the MMU)
* Core 2 - if that's the case, then Atoms/Atom-derived CPUs are likely unaffected
* Something later - same deal about Atoms/Atom-derived CPUs likely being unaffected.

Reply Parent Score: 8