Linked by Thom Holwerda on Sat 3rd Feb 2018 14:15 UTC, submitted by Drumhellar
Mac OS X

When users attempt to launch a 32-bit app in 10.13.4, it will still launch, but it will do so with a warning message notifying the user that the app will eventually not be compatible with the operating system unless it is updated. This follows the same approach that Apple took with iOS, which completed its sunset of 32-bit app support with iOS 11 last fall.

This is good. I would prefer other companies, too, take a more aggressive approach towards deprecating outdated technology in consumer technology.

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RE[5]: Comment by ebasconp
by zima on Tue 6th Feb 2018 01:24 UTC in reply to "RE[4]: Comment by ebasconp"
Member since:

x86 is the only arch that was stupid enough to begin with that it needed extra registers in 64-bit mode

Did it really "need" them or was that simply a nice bonus that AMD threw in?

Reply Parent Score: 2

RE[6]: Comment by ebasconp
by Kochise on Tue 6th Feb 2018 06:11 in reply to "RE[5]: Comment by ebasconp"
Kochise Member since:

Not really a bonus, the original x86 register set was a legacy of the 8 bits era that had just a couple accumulators. While the 68000 ditched the 6800/6809 past out and provided coders with 8 full orthogonal data registers, 8 more address registers and a bunch more system registers, all of this in 1979, the x86 continued providing only a handful of weird registers used either for math, or for memory access, or for system configuration.

AMD just tried to par with "normal" cpus.

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RE[6]: Comment by ebasconp
by ahferroin7 on Tue 6th Feb 2018 12:54 in reply to "RE[5]: Comment by ebasconp"
ahferroin7 Member since:

Considering that the status-quo even for CPU architectures of roughly the same vintage was at least 8 GP registers? Yeah, I'd say it did need them, especially considering the other restrictions the 16 and 32-bit modes imposed on the usage of those 4 'general purpose' registers (for example, most of the math operations only output to AX/EAX, the loop instruction only lets you use CX/ECX as the counter, etc).

Quoting myself from elsewhere in the comments:

The Motorola 68000 has 8, ARM has 15 (pre ARMv8) or 31 (ARMv8 and newer), MIPS has 32, SPARC has 31, PPC has 32, and IA-64 (Intel's now defunct Itanium ISA) has a whopping 128. More general purpose registers means you need to make fewer memory accesses when working with small amounts of data (or don't have to regularly load and store frequently used values), which is a huge performance boost in many cases.

Extending that list with further examples: HP PA-RISC has 32, DEC Alpha has 31, OpenRISC has 16 or 32, Rensas/Hitachi SuperH has at least 16, RISC-V has 15 or 31, VAX (which pre-dates the 8086) has 16, the original IBM S/360 (which also predates the 8086) has 16, Hitachi H8 has 8, TI MSP430 has 12, Atmel AVR has 32, and Microchip PIC has at least 32 as far as the ISA is concerned (specific implementations may have fewer).

In fact, the only CPU architecture of that vintage to survive to the modern day in widespread usage that I know of that has so few GP registers other than x86 is the Zilog Z80, and that's an 8080 clone.

Reply Parent Score: 2

RE[7]: Comment by ebasconp
by zima on Wed 7th Feb 2018 19:58 in reply to "RE[6]: Comment by ebasconp"
zima Member since:

Yes, you're saying that more-than-x86 registers is fairly standard among CPU architectures and good to have - however I wondered if ...something in AMD64 strictly needs them to work. ;)

PS. While searching info on x32 I stumbled on so it seems not only Gentoo that you mentioned toyed with it a bit...

Edited 2018-02-07 19:59 UTC

Reply Parent Score: 2