Star Sun Open Sources UltraSPARC T1 Processor
Linked by Thom Holwerda on Wed 7th Dec 2005 09:41 UTC, submitted by Sebastian Schildt
SUN Microsystems Sun announced plans to publish specifications for the UltraSPARC-based chip, including the source of the design expressed in Verilog, a verification suite and simulation models, instruction set architecture specification (UltraSPARC Architecture 2005) and a Solaris OS port. The goal is to enable community members to build on proven technology at a markedly lower cost and to innovate freely. The source code will be released under an Open Source Initiative (OSI)-approved open source license. The 'older' SPARC architectures were also open.
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RE[6]: Verilog? (clock rates)
by nimble on Thu 8th Dec 2005 15:47 UTC in reply to "RE[5]: Verilog? (clock rates)"
nimble
Member since:
2005-07-06

Thanks Jon for a more thoughtful and interesting reply.

The XBox's Xenon CPU has three similarly simple in-order cores but with a much longer pipeline at 3 GHz. So I guess the "cumulative" clock frequency is about the same while power consumption is in the same ballpark too, so that makes sense. (But does power consumption go up linearly with clock frequency?)

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