When HP designed the 3000 series 30 using the processor from the HP 300 they had to make it compatible with previous HP 3000s and the HP MPE OS they ran. This entailed breaking down the MPE OS into 2 parts, those that were entirely software dependant, and those that were hardware dependant, and then writing the microcode to handle the hardware dependent part of the OS. Like the HP 300, the HP 3000 architecture is stack based, with the PCU chip holding 2 Top of Stack registers for fast access to the (off chip) stacks. The Series 30/33 have a total of 214 instructions while the HP 300 uses just under 200 instructions. Instructions are 32 bits long and typically [sic]
The exact same ICs are used for the HP 300 as for the Series 30/33 with ‘one pin of each chip tied to a different voltage level.’ Exactly what pin that is and what voltage is not said. Looking at the handdrawn schematic of the Series 33 does show the /DIS pin pulled high (12V) on both the RALU/RASS chips, though what that pin is for is unknown.
Snippet from a concise but dense and interesting article.
I had a vacation job in about ’85 that involved writing some C (probably) code on one of these. I still remember it because I had to debug the surprising (to me, at the time) silent unaligned word load behavior. I’ve never done int a = *(int*)(random_char_pointer) since. Loads only worked as expected if data was naturally aligned. Misalignment didn’t trap, it just gave you the value from the aligned-down address…