“RISCOS Ltd., developer of RISC OS 4, yesterday announced its pricing scheme for RISC OS 4.39, the next major release of everybody’s favourite 26 bit mode operating system. The announcement confirms our initial figures which we revealed early last month. RISCOS Ltd. have also disclosed that the price of RISC OS 4.02 ROM sets are set to increase from March this year.” Read the rest at Drobe.
RISC OS 4.39 and 4.02 pricings confirmed
2004-02-21 RISC OS 3 Comments
I don’t know much about RISC OS or the hardware that run this OS. But 26bit? This is getting old real fast! At least step up to the 32bit world. Even Amiga is in 32bit.
We are moving forward (slowly) to 64bit with Apple G5, AMD and soon Intel…
Who is still using RISC OS? And a better question, Why?
Aww, come on guys, don’t be so harsh. At least RO5 is 32-bit.
The ARM uses 32bit registers and a 32bit Address bus (hence is a 32bit processor), and it was 32bit when Amiga was 16bit Some versions of the ARM in fact use a 64bit data bus (to fetch x2 32bit instructions at one time).
The “26 bit mode” referred to is that older versions of RISC OS (Versions up to 4.39) used this “mode” of operations. It refers *not* to the instruction size but ths size of the Program Counter (ARM’s up to StrongARM had the flags and Program Counter in one Register (R15)) this meant you could either save or restore BOTH the PC and PSR (Flags) with one instruction (other processors would typically need two one to restore/save the Program Counter (PC) and the other to restore/save the flags (if required)).
Thus the 26bit mode was created to speed up handling interrupts. Later versions of the ARM abandoned it – RISC OS 5.0X uses 32bit PC use while the other branch of RISC OS (up to 4.39) uses the 26 bit mode of operation.
If you were to clock an ARM similarly in 26bit or 32bit mode the performance would be the same (as the data size and instruction size in both cases is 32bit) – so there is no real speed advantage in using one over the other (except when handling interrupts where if you *wanted* to keep the flags you have a one instruction penalty in 32bit mode).
The relative merits are as follows:
26bit mode allows more compatibility with *older* RISC OS programs, but limits the size of memory space for programs (as the PC is limited to 26bits). This is usually not a problem as most RISC OS programs are fairly small and have small memory footprints.
32bit mode (RISC OS 5.XX only) allows the use of later (faster) ARM processors (which use a full 32bit for the PC and have a separate CPSR (flags) register but no 26 bit mode) – this does allow for larger programs. RISC OS 5.XX also has hardware abstraction so can run newer compeditative hardware (something the 26bit RISC OS variants can’t do).
Hope that clarifies things…..