IBM is not only discontinuing support for Intel’s Itanium processor in a new generation of server technology, it’s going a step further, dropping Itanium servers from the product line altogether, sources familiar with the situation said.
Sources: IBM ditching Itanium altogether
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is that the no-execute cpu?
No, your thinking of the AMD64/Opterons.
Heres some more info
http://www.amd.com/us-en/assets/content_type/DownloadableAssets/dwa…
About time they dropped their competitor’s product!
After all, IBM has the POWER line, which is its own and arguably better than Itanic.
this is off topic, but does anybody else find the domain news.com.com completely absurd? even more so since cnet also owns news.com!
probably to protect websurfers from cybersquatters…
Seeing as IBM has their own competing Power architecture that they just seriously modified in the form of Cell, I don’t think this can be a surprise.
Looks like the world is going to be polarised into two camps, the SPARC camp with SUN/Fujitsu and in the other camp, IBM/Apple with POWER/PowerPC. Sorry to say this, but HP and Intel Itanium have no future. They had a window of 4 years to fix the problems with the crappy performance, lack of software, lack of third party vendors (to provide motherboards, chipsets and so forth).
If they couldn’t get the damn thing working in the four year window they were offered, they will never get it working properly.
RE: Paul (IP: —.client.comcast.net) – Posted on 2005-02-26 03:41:27
May I suggest that you actually get a clue on the Cell processor. The cell processor would be crap for general purpose computing. Essentially it is a block with a whole heap of vector CPU’s. Great for games and multi-media, crap for everything else.
“crap for everything else.” like for what? Word processor? Or what do u do on ur home pc what requires so much cpu power what cell couldn’t handle?
That would be the same Fujitsu as http://news.com.com/Fujitsus+behemoth+Itanium+server+imminent/2100-… this one?
Sun’s SPARC CPUs are pieces of crap. Fujitsu’s aren’t great, either.
Oh, and I seriously doubt that you “get” string theory, whatever the f*** that had to do with anything.
Oh pulease. It was a comparison between things that are complex to understand.
Oh, and latest rumour, the cell could be put to use as a graphics co-processor card, which is a more likely senario than a vector processor being used for Aunt Perls desktop.
I wouldn’t be sure that Cell would be “crap” for general purpose computing. After all, it does have a 4GHz PowerPC processor. It is an in-order processor, but then again, so is SPARC. I’d say that the UltraSPARC III might offer a first-order approximation of what the PPE might perform like. While the current SPARCs don’t even rank near the top of the SPEC rankings, something like a SPARC running at 4GHz might not be too bad.
I wouldn’t be sure that Cell would be “crap” for general purpose computing. After all, it does have a 4GHz PowerPC processor. It is an in-order processor, but then again, so is SPARC. I’d say that the UltraSPARC III might offer a first-order approximation of what the PPE might perform like. While the current SPARCs don’t even rank near the top of the SPEC rankings, something like a SPARC running at 4GHz might not be too bad.
You’re assuming, however, that there will be a bunch of full PowerPC chips sitting in there. We all know that it wouldn’t be possible; SUN has chosen instead to have 8 very basic cpus that can quickly switch between threads, and can do 32 threads over all.
With the Cell processor, the more than likely scenario will be vector processor with the PowerPC or POWER ISA slapped ontop of it. Seeing that the core focus will be on gaming, and not being a general purpose CPU, I would more interested in seeing where IBM will take their POWER/PowerPC 970 in relation to multi-core.
Still, the PS3 and other derivative will have a graphic card(Nvidia one). So the Cell is not going to be used as a 3D accelerator – the latest monster of nvidia can push lot of poly, a lot more than any cpu can handle(and provide to the graphic card, it’s a well know bottleneck).
IBM seem to try to push the cell out of the PS3, and it seem for what I’ve read(Ars Technica, some other link provide by Hannibal…) that there will be a full PowerPC core… Modified or not, we will see, but it’s something IBM can adapt to a lot of use.
More and more people jumping off the Itanic. The only ones who’ve done anything cool with it, really, are SGI.
PPC64 I think is a better platform, anyway. It’s been around for a long time, and, now scales from the low-end (iMac) all the way to very high-end (POWER5), and the same code runs. It will also run 32-bit PPC code very quickly.
Itanic is all out there by itself, only running its own code well. The tacked-on IA-32 support is what’s doomed it.
Still, the PS3 and other derivative will have a graphic card(Nvidia one). So the Cell is not going to be used as a 3D accelerator – the latest monster of nvidia can push lot of poly, a lot more than any cpu can handle(and provide to the graphic card, it’s a well know bottleneck).
No, if you read what I posted, I clearly stated that there was a rumour that *Apple* may consider using it as a graphics accelerator; what I meant by this, was, when you’re doing your encoding, that process is sent off to the cell processor, which would excel that things like that.
How can you expect a good cpu . If we can’t even get a programming language better than C , in how many Years?
There is some brains on this site but what Attitude!
Are we doomed to gaming consoles.
It is unlikely that Sony will go with an off the shelf graphics card like ATI or nvidia. The will most likely continue to develop and use the Emotion Engine used in the PS2. It’s difficult to program but does a fantastic job at delivering 3D graphics.
PS2 is how old and it’s still competing head on with Xbox?
http://www.theregister.co.uk/2004/12/07/nvidia_ps3_design_win/http:…
i thought amd opteron killed itanium
b/c of x86 compatibility. itanium was supposed to replace x86
Hey people, please stop trolling and flaming about IA64, you are completely missing the point with the sentences like “The tacked-on IA-32 support is what’s doomed it”. Maybe IBM POWER, or SPARC are running IA-32 code faster, heh?
As for “Itanium is dead”, well, according to IDC, the sales of the IA64 in the Q2 2004 was 3 times more than corresponding 2003 period, and the sales of the servers powering by Itanium with more than 64CPU increased by more than 10 times.
What Intel did was to add cache, and then more cache on chip. This is similar to the P4 EE (Emergency Edition).
Just using 64 CPUs, the IBM Power5 gets 3 times the performance in TPC-C than the 64-CPU HP-Itanium.
With 16-CPUs, the IBM Power5 570 is around 80% the performance of the 64-CPU HP-Itanium Superdome.
Hmm, the performance is really bad if the workload doesn’t fit in the cache. Also, in order to get good performance, the code can’t have too much branches.
http://www.tpc.org/tpcc/results/tpcc_perf_results.asp?resulttype=no…
IA64 was supposed to replace the x86 line…
And also, there’s a large number of software packages supporting Solaris/SPARC and AIX/PPC, but not as much on the Itanium.
Even for opensource projects, not too many offer binaries for IA64, even the package is available for all major platforms:
http://gridengine.sunsource.net/project/gridengine/download.html
With the popular SGE users mailing list that has over 300 messages, turns out that only 1 guy was asking for binaries for IA64.
(BTW, SGE supports Linux/IA64, just that the download volume was so low that the developers dropped offering precompiled binaries)
It’s actually over 300 messages per month:
http://gridengine.sunsource.net/servlets/SummarizeList?listName=use…
As for “Itanium is dead”, well, according to IDC, the sales of the IA64 in the Q2 2004 was 3 times more than corresponding 2003 period, and the sales of the servers powering by Itanium with more than 64CPU increased by more than 10 times.
What are the real numbers?
If 3 Itanium servers sold in Q2 2003 and 9 in Q2 2004, If one 64 way box sold and 10 now sell the ratios are the same.
Please post the real numbers.
Most vendors have or will discontinue thier Itanium lines. HP discontinued thier Itanium workstations, and sold thier Itanium R&D team to Intel.
HP cited X86-64 as the reason for thier workstation line to be discontinued.
HP co-developed Itanium with Intel. If they are slowly moving productlines out it doesn’t sound like they are too confident in Itanium volumes.
You’re assuming, however, that there will be a bunch of full PowerPC chips sitting in there.
No, I’m not. Each Cell has several SPEs (vector processors), and one PPE (regular processor). The PPE runs the OS and serves to upload code to and download results from the SPEs. From what IBM has said, the PPE supports the full PowerPC architecture, and is an in-order 2-issue design with 32-64KB of L1 cache and 512KB of L2 cache. In comparison, the USIII is a 4-issue design with 96KB of L1 cache and no onboard L2 cache. Both are in-order designs with no OOE. The SPARC has an edge in issue rate and L1 cache while the PPE has an edge in L2 cache and memory bandwidth.
On paper, I would expect the PPE to perform 50-75% as fast (or more, depending on if the problem is bandwidth-limited) for a SPARC at the same clockspeed. Something performing like a 3-4GHz SPARC, while not in the same league as a 3-4GHz Opteron, would still be nothing to sneeze at.
We all must run Microsoft Windows. And Windows doesn’t run on Itanium. That’s why we love AMD and their revolutionary and innovating processors.
2raptor: I don’t have the exact number of systems, but some info can be found here:
http://www.theregister.co.uk/2004/08/30/opteron_itanium_sales_q2/
>We all must run Microsoft Windows. And Windows doesn’t run on >Itanium.
Nope, it does
http://www.microsoft.com/windowsserver2003/64bit/ipf/default.mspx
From what IBM has said, the PPE supports the full PowerPC architecture, and is an in-order 2-issue design with 32-64KB of L1 cache and 512KB of L2 cache. In comparison, the USIII is a 4-issue design with 96KB of L1 cache and no onboard L2 cache. Both are in-order designs with no OOE. The SPARC has an edge in issue rate and L1 cache while the PPE has an edge in L2 cache and memory bandwidth.
The UltraSPARC III has an off chip 8MB l2 cache. You can’t just ignore that for the sake of your argument.
Why not take the UltraSPARC IIIi for comparisons? It has an on-chip 1MB L2 cache. At 1.6Ghz the USIIIi has SPEC scores very close to a 1.6Ghz Opteron. So scaling it to 3-4 Ghz would make it closer to an opteron at that frequency and leave the PPE in the dust.
Also while the PPE has a 512 KB L2 cache it is connected by a bus to the SPEs.
Sorry Stare, the article you posted doesn’t paint a rosy picture. Hence my reason to ask for the numbers.
Tripling and 10 times don’t mean much if you starte very low in volume.
The Itanium has missed revenue projects by 13+ billion for sales in 2004. Gartner predicted a $14Billion market for Itanium. That speaks more for the sorry state of affairs with Itanium.
Total Itanium server sales hit $319m in the second quarter, which beat out the $287m total from the first quarter and crushed the $70m total from last year’s second quarter. Total shipments hit 5,665 in Q2 compared to 2,717 in the same quarter last year.
The Itanium ecosystem is as unhealthy as ever with HP totally dominating sales. HP moved 4,789 of the 5,665 boxes shipped in the second quarter, earning $250m in revenue. That total is roughly equivalent to the RISC server business done by IBM or Sun in one week. HP, however, did more than double shipments from the 2,262 boxes moved in last year’s second quarter. Still, HP’s customers are understandably concerned about the Itanic’s course.
While it’s true that the UltraSPARC has an off-chip 8MB L2 cache, the PPE does have a memory bus with 3x the bandwidth of the UltraSPARC’s cache bus, albiet much higher latency. In any case, it’s irrelevant that a 4GHz SPARC would leave an Opteron in the dust. There are no 4GHz SPARCs. However, if the PPE’s architectural similarity to the SPARC means it can achieve 50-75% of the performance, clock for clock, the PPE might make a decent competitor to a 2GHz Opteron. Certainly, it’s way beyond “total crap” for general-purpose code, or whatever Kaiwai called it.
I would bet that the only driver for increasing Itanium sales is that PA-RISC customers don’t have many choices if they want to stay with HP.
Given that Solaris/SPARC or even Linux/POWER have a much brighter future than HPUX/Itanium, I wonder how many customers make the jump. We’ll see if the Itanium numbers continue increasing in the short term but, then, plateau. That would mean all the HP customers who would move to Itanium would have done so, and everyone else would have jumped.
While it’s true that the UltraSPARC has an off-chip 8MB L2 cache, the PPE does have a memory bus with 3x the bandwidth of the UltraSPARC’s cache bus, albiet much higher latency.[i]
The EIB that connects the L2 cache to the PPE core is 32bytes/cycle. The USIII has a 32byte/cycle bandwitdh to its l2 cache.
However, I am still figuring out why you won’t consider the UtraSPARC IIIi.
[i]Certainly, it’s way beyond “total crap” for general-purpose code, or whatever Kaiwai called it.
Comparing it to today’s G5s and G4s yes it would be, all PowerPC chips, it might be.
Let me remind you that we are all talking about hypothetical numbers, from stuff that isn’t even in the market yet. When IBM releases a workstation based on the Cell, we can talk more. Till then this is all speculation.
Let me remind you that we are all talking about hypothetical numbers, from stuff that isn’t even in the market yet. When IBM releases a workstation based on the Cell, we can talk more. Till then this is all speculation
Exactly.
The PPE will be very dependant on the compiler – just like the Itanium, but then Itanium is a very potent processor.
For 99.9% of consumers it’ll be just fine – a lot of stuff can be vectorised and that’s the SPE’s area.
The Cell wont compete with POWER or Itanium though. Their strengths are completely different and they’ll not be targeted at the same market (though you may see Cells used as co-processors in high end IBM boxes eventually).
Itanium may be around for a long time yet, while it ships in small numbers Intel make a very healthy profit from it.
The EIB that connects the L2 cache to the PPE core is 32bytes/cycle. The USIII has a 32byte/cycle bandwitdh to its l2 cache.
The EIB is 64 bytes/cycle, running at 2GHz. The USIII L2 cache bus is 32 bytes/cycle running at 300Mhz. That gives the EIB a peak rate of 128GB/sec, and the USIII bus a peak of 9.6GB/sec.
However, I am still figuring out why you won’t consider the UtraSPARC IIIi.
Clock-for-clock, the USIIIi doesn’t perform that differently than the USIII (10-15% slower). It’s just available in much faster clock-speeds. At the level of gross-estimation we’re considering, 10-15% dosen’t make much of a difference.
Let me remind you that we are all talking about hypothetical numbers, from stuff that isn’t even in the market yet.
Undoubtedly, but there is no reason we can’t make educated estimations, or put upper and lower limits on the possible performance. The PPE is a 2-issue in-order processor, while the UltraSPARC III is 4-issue in-order processor. Take the UltraSPARC III’s SPECint at 1GHz, which is 610. Halve it to account for the issue rate, then quadruple it to account for the clock speed. Note that the former estimate is pessimistic, while the latter is optimistic. That gives you about 1200, which puts it between a 2.2Ghz Athlon XP, and a 2.0GHz Athlon 64.
It’s speculative, yes, but consider Kaiwai’s statement: “Great for games and multi-media, crap for everything else.” I don’t think there is any reason to believe that this statement would be accurate, and indeed, fairly good reason to believe that it wouldn’t be.
Clock-for-clock, the USIIIi doesn’t perform that differently than the USIII (10-15% slower). It’s just available in much faster clock-speeds. At the level of gross-estimation we’re considering, 10-15% dosen’t make much of a difference.
They use the exact same core. Thier cache hierachies are different.
Undoubtedly, but there is no reason we can’t make educated estimations, or put upper and lower limits on the possible performance. The PPE is a 2-issue in-order processor, while the UltraSPARC III is 4-issue in-order processor. Take the UltraSPARC III’s SPECint at 1GHz, which is 610. Halve it to account for the issue rate, then quadruple it to account for the clock speed. Note that the former estimate is pessimistic, while the latter is optimistic. That gives you about 1200, which puts it between a 2.2Ghz Athlon XP, and a 2.0GHz Athlon 64.
There is no harm in making educated guesses. But Let’s get to reality here.
Nothing about the Cell says it will be a cheap cpu. The Die size alone is approx 4x the PPC970. Why would a cpu that performs worse than a ppc970 and costs more be good for the general case?
It’s speculative, yes, but consider Kaiwai’s statement: “Great for games and multi-media, crap for everything else.” I don’t think there is any reason to believe that this statement would be accurate, and indeed, fairly good reason to believe that it wouldn’t be.
I am not defending Kaiwai. All I am trying to get at is there is too much hype around Cell by STI. But what ever data there is today doesn’t tell us if it will be a good cheap cpu for the general case. It is a great cpu for it’s intended purpose, but a PC chip It seems unlikely to be as great a choice. It might be adequate but there will be cheaper faster chips for PCs in that time frame.
Isn’t Itanium supposed to handle branches better
than anyone? I mean Itanium have not just one or two
but THREE branch execution units.
While POWER4/5 have only one ( or two ?) branch units.
IA32 performance is not a consideration for POWER
nor SPARC. But the fact that IA64 had poor x86 performance
did not help it.
The Die size alone is approx 4x the PPC970. Why would a cpu that performs worse than a ppc970 and costs more be good for the general case?
1) Define the “general case”.
2) What makes you so sure it’ll be worse than a 970?
3) Will the clock speed & memory bandwidth not make up for any differences in architecture?
4) Don’t you think IBM will have made other enhancements to compensate?
An example:
The only *intensive* things I do are SETI@home, iTunes & occasionally iPhoto. One day I’ll get around to using iMovie – That lot can be accellerated by an SPE. Everything else I do runs fine on a 1.33GHz G4 / Nvidia 5200 (yes really, I have no complaints about the speed – OS X may have been slow a couple of years back but not these days).
However you’ve completely ignored the SPEs which is really what the Cell is all about, the PPE is really only a controller.
Kawai you responded:
Still, the PS3 and other derivative will have a graphic card(Nvidia one). So the Cell is not going to be used as a 3D accelerator – the latest monster of nvidia can push lot of poly, a lot more than any cpu can handle(and provide to the graphic card, it’s a well know bottleneck).
No, if you read what I posted, I clearly stated that there was a rumour that *Apple* may consider using it as a graphics accelerator; what I meant by this, was, when you’re doing your encoding, that process is sent off to the cell processor, which would excel that things like that.
———————
I’ll add onto this line of thought with a bit of history. NeXTDimension was way ahead of it’s time, buggy and not completely ready for what its true design entailed.
The CELL is perfect with this type of scenario that would be an add-on to a PowerPC G5/G6 for Graphics/Media professionals needing Real-time processing in stuff like Final Cut Pro, Motion and other apps.
With QuickTime 7 and it’s push of H.264 having an on-board set of DSPs with Cell Vector Units to coordinate with a Multi-Core 970 based system would really satisfies NAB and other industries needing such capabilities. The medical applications for this set up as well as flight simulations, etc., come to mind.,
[i]But what ever data there is today doesn’t tell us if it will be a good cheap cpu for the general case.</>
I never said it’d be a good CPU for general purpose work, I said it wouldn’t perform “like crap” for general purpose work. If you’re not going to use the SPEs, then clearly the Cell isn’t a good fit, but that’s different from saying that it would perform badly for general purpose work.
First, I read your article on the Cell. Nicely done.
1) Define the “general case”.
General purpose computing. I am not saying it won’t work but it won’t be cost effective.
2) What makes you so sure it’ll be worse than a 970?
The 970 is a power4+ derivative, All the Data available today says the PPE won’t be as powerful.
3) Will the clock speed & memory bandwidth not make up for any differences in architecture?
The initial 4 device 512 Mbit XDR memory subsystem is limited to a maximum of 256MB according to one of the articles. Theorticallly with fancy lay out you maybe able to do a 36 device/channel and get upto 16GB of memory, however such a setup would be extremely expensive given the cost of XDR memory.
4) Don’t you think IBM will have made other enhancements to compensate?
Like I said there is enough hyoe around the Cell to be sure. Also IBM still makes the 970 and has a road map doesn’t it.
The only way to make the Cell cheaper is to readuce the number of SPEs on core and get the die size smaller, Or wait for the 65 nm process.
I doubt the Cell will be a replacemeny chip for PCs atleast the version IBM has shown recently.
I never said it’d be a good CPU for general purpose work, I said it wouldn’t perform “like crap” for general purpose work. If you’re not going to use the SPEs, then clearly the Cell isn’t a good fit, but that’s different from saying that it would perform badly for general purpose work.
A 700 MHz Celeron would also perform adequately for “General Purpose” work. But something so hyped recently as being the x86 killer just performing adequately for general computing tasks can be considered crappy.
I told you already that I am not defending Kaiwai. I am just peeved that everyone if hyping the cell without actually even using it. If it really is that good kudos to STI. But I believe in getting hands on experience before passing judgement.
Isn’t Itanium supposed to handle branches better
than anyone? I mean Itanium have not just one or two
but THREE branch execution units.
Aaah!! Should be infered from your rationale that the Itanium is able to handle three branch at the same time? I have read everything about Itanium but I think this one is the best. I should ask your permission to put this in my fortunes.
No frankly, branch is not a Good Thing(tm). Not just because, as for any platform, it potentially change the flow of execution, but because it is often associated with a condition which itself cannot be computed in parrallel with the other instructions but sequencially, which is a great lost in execution opportunities.
was just surfing the sgi.com website, and wondering what happened to all the Itanic processor based workstations ??
All I see is MIPS based workstations…
How dead can dead go.
All I see is MIPS based workstations…
Search a little bit more…
http://www.sgi.com/products/visualization/prism/