Linked by Thom Holwerda on Mon 17th Sep 2007 20:51 UTC
Oracle and SUN "Sun announced Niagara 2 the other day, an evolution of the older Niagara 1, now called the UltraSPARC T1. From the 10000-foot view, it all looks quite familiar, but once you delve into the details, it quickly becomes apparent that almost everything has changed."
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RE: Very interesting...
by crystall on Tue 18th Sep 2007 08:08 UTC in reply to "Very interesting..."
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besides a clock speed increase (which is likely stuck being tied to the FSB/RAM speeds in practice)

Since the UltraSPARC Tx architecture trades latency for bandwidth like GPUs increasing the clock speed doesn't make sense if you are already saturating the memory subsystem. As long as enough bandwidth is available you enjoy almost linear scaling from clock speed but the scaling completely flattens once you reach the saturation point.

Perhaps in theory, with enough transistor budget, they might be able to add some out of order execution in there

It doesn't make sense to add OoO execution to such an architecture simply because it doesn't need it. The UltraSPARC Tx is inherently optimized for throughput, all the latencies (memory stalls, branches, non-single-cycle instructions, etc...) are covered by switching threads. OoO execution would make the core significantly more complex with little or no benefit for such an architecture. Look for example how 2-way dispatch has been implemented in the T2. A core cannot execute two instructions from one thread but two instructions from two threads each one picked from one of the two thread groups. This eliminates any needs for an intra-thread dependency checking in the pick stage and while it doesn't improve single-thread performance it increases throughput significantly.

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