Linked by Thom Holwerda on Fri 21st Mar 2014 22:58 UTC, submitted by axelmuhr
OSNews, Generic OSes

This is a project for breathing new live in Helios, an OS from the 90's. Helios was developed by the (now defunct) company called Perihelion Ltd., mainly targeting the INMOS Transputer but later adding other CPUs like the ARM series or TMS320c4x DSPs when INMOS' decline became clear.

The project's website has more details.

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Fascinating.
by lproven on Sat 22nd Mar 2014 11:10 UTC
lproven
Member since:
2006-08-23

[/Spock]

More info than I've ever read about Helios before. I didn't realise it lacked memory protection and was essentially one-task-per-Transputer before. That is more limited than I realised.

But still... I wonder if it could be ported to run on a Tilera chip?

http://www.tilera.com/products/processors/TILE-Gx_Family

Reply Score: 3

RE: Fascinating.
by BlueofRainbow on Sat 22nd Mar 2014 12:18 in reply to "Fascinating."
BlueofRainbow Member since:
2009-01-06

I don`t see why one-task-per-Transputer is limiting.

No matter how one cuts the proverbial hair, a processing unit can only execute one task in a given unit of time.

Multi-tasking carries a pricey overhead related to task-switching. Now, if the tasks are associated to processing units on a one-to-one relationship and there is an efficient and safe management scheme for the common resources (I/O, physical memory, virtual memory), then who knows?

From what I remember, efficient inter-Transputer communication was necessary and Inmos came up with a number of innovative technical solutions - some of them still with us. I believe that there is one IEEE standard based on Inmos solution - don`t remember the details though.

Reply Parent Score: 2

RE[2]: Fascinating.
by jockm on Sat 22nd Mar 2014 15:02 in reply to "RE: Fascinating."
jockm Member since:
2012-12-22

That is a fair point when there are transputers in the world. But ported to a modern architecture that would mean Helios could run 4-12, processes at a time ... without a memory manager.

A big part of why Helios could get buy with a MMU was because it relied on the message passing architecture of the Transputer and thus limiting the areas where were apps could overwrite other apps memory (though far from entirely)

Helios would be rather interesting on the Cell processor, or Tilera chips mentioned elsewhere, or the XMOS stuff (if they ever allow more than 64K per chip).

But on the kinds of architectures most people would run it on, that kind of one process per core approach is going to be very liniting

Reply Parent Score: 5

RE[2]: Fascinating.
by tylerdurden on Sat 22nd Mar 2014 21:04 in reply to "RE: Fascinating."
tylerdurden Member since:
2009-03-17


No matter how one cuts the proverbial hair, a processing unit can only execute one task in a given unit of time.


That depends on how you define processing unit, execute, and task.

Furthermore, although context switch overhead was a significant factor way back in the single/low double digit MHz era, in the GHz designs of today the number of instructions between interrupt ticks is so large that context switch overhead is basically noise.

Reply Parent Score: 6