“The arithmetic-logic unit is a fundamental part of any computer, performing addition, subtraction, and logic operations, but how it works is a mystery to many people. I’ve reverse-engineered the ALU circuit from the 8085 microprocessor and explain how it works. The 8085’s ALU is a surprisingly complex circuit that at first looks like a mysterious jumble of gates, but it can be understood if you don’t mind diving into some Boolean logic.”
That guy has a extremely interesting blog!
Now waiting for the guy who will write an 8085 emulator in javascript. Srsly!
Well, so far, they’ve managed to emulate its performance so they’re part way there already.
Am I the only one that misses the old days when we had so many choices in both CPUs and even in X86? We had so many choices, Motorola and PPC and Intel, AMD, WinChip, Cyrix, so many choices! Remember what it was like when you could actually put a different CPU from a completely different company into a socket?
Now we only have 2 companies in X86 (three if you count Via but its nearly impossible to find) and while there are plenty of companies making ARM there just isn’t the variation like we had.
Yep I miss’em too. Not enough to want to go back there though. I remember tiptoeing around flaws in specific chips with particular operating systems.
Heck – even 287 chips that would throw a wobbly given a very specific combination of valid (FP) arithmetic inputs. It was reproduceable very consistently. Took a few engineers a while to spot that it was the chip, not the high level code and not the compiler!
Yeah there were choices, but most (all?) of them much worse than today in performance per price…
And it seems you don’t miss the old times that much yourself – you often write about the goodness that modern multicore x86 chips are.
There’s MIPS. There’s nVidia GPUs that doubles as super computers. There’s Power/Cell. There’s SPARC.
The visual6502 site is particularly interesting, I’m touched that some people still want to learn this stuff.
In my first chip design job back in 1979, I had the privilege and time to reverse engineer about a dozen microprocessors and other device types. Not the entire chip, just all the interesting blocks like the data-paths which included the ALU, control memory or PLA blocks, clock drivers, IO pads and the like. I wanted to learn from the masters so I could produce similar quality work later on for a another parallel processor. The company had the good sense to own some good microscopes and camera toys.
Almost all of these chips were 5V NMOS which at the time still included dynamic logic based on flying bootstrapped switches or pass gates, all precharged discharge logic, plus back bias substrate generators to pump the substrate down to about -3V. Much of this circuit material is still covered in one of the classic Addison Wesley VLSI design text books esp the Dobberpuhl book which is very transistor oriented. The other classic VLSI text book based on N Weste was simple CMOS logic oriented.
The most fascinating devices I ripped though were in my opinion the TI9900, the Z8000, and the 68000, because we needed to know more about 16 and 32 bit design.
The 8 bit chips were not that interesting to me because they were on such a tight transistor budget they were architecturally puny. Also their circuit design technique wasn’t very advanced either.
I was already a big fan of the 9900 architecture since I spent quality student time at TI. All of these 16 bit chips also included Mul and Div codes.
The TMS9900 chip was interesting because it got 16 bits of work done with just a 1 bit serial ALU and was fast enough to be comparable to the static 8 bit chips and could be made dirt cheap. It also had 12V, 5V, and -3V power so the design used mostly pure dynamic circuit switching. The 12V clocks allowed for gated clocks to drive logic faster than 5V static logic could at the time. Depletion mosfets were still scare at the that time so a lot of clocked enhancement mode loads.
The Z8000 was a fully static 5V chip designed by the infamous Faggin who had designed the 8080, and 8085? and was a master piece of complex logic design. The ALU carry path was one large logic block to get as much use of carry look ahead as possible, no use of bit slices here so no 16*2 gate delays. IIRC, the Z8000 got the 16 bit carry addition down to about 10 gate delays. All of the control logic for instruction decode was full random logic too, no structured microcode ROM or PLA logic used.
The 68000 was the last project to reverse, it was after all a real workstation chip. The design was the antithesis of the Z8000, full use of microprogramming and nano code opdecode, full use of gated clocks, full replicated 16+16 bit data path with repeated cells. Very easy to figure out the main blocks.
The 8086 was done too, it also featured carry pass transistor logic, very regular data path cells, big PLAs, but the segmented architecture left me cold, who would want to program such a crippled architecture.
I’m certain I still have all the schematics I did in the basement.
While reverse engineering might seem to be a useless skill, it later turned out to be very useful for 2 projects decades later where we had to move a customers chip from 1970s NMOS to 1990s CMOS std cell. There aren’t that many people that know how to read old chips even for money.
I honestly show full interest into the 68000 stuff you done ! That would complete the only two pictures of the chip virtual6502 made about the 68k cpu. If we could simulate it, at an electrical level, that would be awesome
Kochise