But what’s so compelling about RISC-V isn’t the technology – it’s the economics. The instruction set is open source. Anyone can download it and design a chip based on the architecture without paying a fee. If you wanted to do that with ARM, you’d have to pay its developer, Arm Holding, a few million dollars for a license. If you wanted to use x86, you’re out of luck because Intel licenses its instruction set only to Advanced Micro Devices.
For manufacturers, the open-source approach could lower the risks associated with building custom chips. Already, Nvidia and Western Digital Corp. have decided to use RISC-V in their own internally developed silicon. Western Digital’s chief technology officer has said that in 2019 or 2020, the company will unveil a new RISC-V processor for the more than 1 billion cores the storage firm ships each year. Likewise, Nvidia is using RISC-V for a governing microcontroller that it places on the board to manage its massively multicore graphics processors.
This really explains why ARM is so scared of RISC-V. I mean, RISC-V might not make it to high-end smartphones for now, but if RISC-V takes off in the market for microcontrollers and other “invisibe” processors, it could be a huge threat to ARM’s business model.
What is a bit “delicate” with RISC-V is that it was first designed as an educational instruction set, allowing simple implementation by students, replacing textbook MIPS.
It makes RISC-V not really innovative, nor optimised.
Worse instruction sets are, of course, still used nowadays for fast CPUs (for example x86 or SPARC), but it is not the “state of the art” of 2015. There is also some feature creep of extensions which may end as competing implementations (like the x86 x87 vs SSE vs AVX…)