“Here’s a riddle: What’s a little bigger than a Wheat Thin, has more transistors than the adult population of the United States, draws as much power as a small vacuum cleaner, and costs as much as a top-quality HDTV? Give up? It’s Intel’s 64-bit McKinley CPU, soon to be released as Itanium 2. McKinley is the newest member of the IA64 processor family.” Read the article at MCPMag.
The 64-Bit Question
About The Author
Eugenia Loli
Ex-programmer, ex-editor in chief at OSNews.com, now a visual artist/filmmaker.
Follow me on Twitter @EugeniaLoli
but i’d rather have a medium quality hdtv and a few top of the line 32 bit processors
It’s remarkably unimpressive. It’s been done, and better by Sun. For 64-bit computing, I’ll stick to my SPARC for now, thanks.
Call me in a few years when IA-64 is interesting.
Intel has done a commendable job of turning the Itanium into a contender, at least for benchmarks.
As this is the very beginning of Intel’s push into 64 bit computing, I am not expecting every aspect of their offering to be mature.
However, just as the 8086 was a harbinger of an incredible evolution, I also expect the Itanium to be so.
There are some damn smart people on the Itanium team. Considering Intel is adding some of the very best Alpha minds to the team, this only bodes well.
What remains to seen is whether or not Intel can make Itanium price/performance competitive with Hammer.
#m
http://mcpmag.com/columns/article.asp?EditorialsID=435
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http://www.redhat.com/software/linux/7-2_itanium.html
this link works…
’nuff said.
If you are going to hop on the Intel 64 Train, at least get source you can recompile as the EPIC/VLIW compiler gets better every day. There is way more fun to be had on Linux. Intel LOVES Linux for the Itanium.
The Microsoft 64 bit OS is only for those who are already in bed with Microsoft. Well, the 64 bit version of SQL Server is rather impressive, I must say. More than the OS in many ways. Big memory is so very kind to databases.
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What remains to seen is whether or not Intel can make Itanium price/performance competitive with Hammer.
Hammer seeks to turn the 32-bit market into a 64-bit one. Itanium seeks to control that extremely profitable niche of 64-bit stuff.
If you are going to hop on the Intel 64 Train, at least get source you can recompile as the EPIC/VLIW compiler gets better every day. There is way more fun to be had on Linux. Intel LOVES Linux for the Itanium.
Intel *isn’t* in love with Linux. They are using it in order to make Microsoft cooperate with them. Cause anytime Microsoft could sign a deal with AMD, IBM, or any other company out there and end Intel’s dominance on its key market and ruin it’s chances on its new targets. And Microsoft knows if Intel turns their backs on them, they would slowly die off. The most unfortunate case of depending on each other :p.
Intel does love Linux for many reasons, including the ones you mentioned on how they use their Linux support vis-a-vis negotiating with Microsoft.
Having worked with Intel, all I can say is that each and every person I worked with there had a major dislike for Microsoft. And the people I worked with on the Itanium team really did love Linux. They are engineers, after all 😉 Microsoft chose a very Windows compatible programming model for supporting 64 bit code in Windows. This choice makes it easier to get existing 32 bit code moved over to 64 bits, but limits the “64 bitness” of applications. Linux chose a technically cleaner model and the Intel engineers liked it more.
As you know, Intel needs to as broad as possible platform support for IA-64. They did even try to get Sun to port Solaris to it.
Linux has been doing a a reasonable job as a development platform that key vendors can use for Itanium. 64-bit Itanium versions of Oracle, Sybase, DB2, etc. just don’t appear out of nohwere.
One has to realize that as far as 64 bit applications go, Microsoft has very few compared to other vendors (SQL Server is the key app). Big iron apps benefit greatly from a 64 bit platform. Win64 is important for several key client apps — CAD and other technical workstation stuff. But most of that runs on *NIX anyway.
You might not be aware of the consequences of working with Microsoft for 20+ years. Certainly there has been sybiosis from a business perspective. But from a personal perspective, there is quite a bit of animosity.
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As you know, Intel needs to as broad as possible platform support for IA-64. They did even try to get Sun to port Solaris to it.
And they caused the x86 port to die
I doubt they want someone who call their hardwork Itanic to port their OS there.
Besides, maybe the engineers of Itanium likes Linux, but Intel does NOT like Linux in the sense as I or you would like it. They like it merely from the business point of view – the same with IBM (but then again, there are some Microsoft engineers that like Linux, doesn’t mean Microsoft likes Linux).
I’ve used one of the original itanium boxes, triple booting between linux, windows xp and hpux. What amazed me is that the machine needed two 220V plugs to function. Granted, it was a server, but the need for dual plugs was not redundancy, it really needed that just to run! It had 4 CPU and 4GB of ram, two internal hot swap 9gb drives. The only reason that I got to use the machine was that my lab was the only one that had free 220v plugs! Anyhow, the rc5des scores on it were worse than my little beos genesis mp box. so there!
Two plugs? That’s a lot of power consumption. What are the specs on your BeOS box?
I’m assuming this test was with unoptimized source using the GCC compiler?
Without the fancy Intel compiler and optimized source, the Itanium won’t have a chance. The first generation chips were very sensitive to code tuning. That’s why they added the extra execution unit and the extra cache for Itanium II.
To even begin to see the Itanium’s performance, you’d have to use Intel’s compiler:
http://www.intel.com/software/products/compilers/c60l/clinux.htm
And it would be fun to see how rc5des runs on tuned code on the new Itanium II.
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One might say that love in the business world is always for advantage, and ideally for mutual advantage. When it comes to large companies with diverse interests, it is more difficult to say “the whole company loves …”. For instance, I have no idea what the flash memory arm of Intel thinks about Linux.
Intel loves Linux for the advantages it gives Intel in the server marketplace. Linux loves Intel for all the money they put into funding the development of improvements to Linux. And Linux loves Intel because , other than AMD, it is the only CPU vendor for cheap and good Linux hardware. I think much of the relationship between Intel and Linux has been for mutual advantage.
Intel’s Job 1 is to sell more processors. The availability of Linux both as a development platform for other apps and as a testing platform for Itanium has been invaluable to Intel. They have been able to sell more processors because of Linux.
As for Sun, well, Intel wants to eat their lunch one way or another. That’s a mighty big slice of server pie that Sun is holding.
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It stands to reason as long as Intel & co wants to push this boulder up a mountain, the power requirements are going to be far outside anything normal users will ever want to deal with.
I just wish the industry in general was alot more aware that there are other ways to solve big compute jobs, the cooler way is to use more modest cpus with plugin FPGA accelerators.
Following the 90/10 rule usually only small parts of most apps need the cycles. Celoxica & others offer SW that allows C code (HandelC to be specific) to be retargeted to an FPGA board to deliver speedups of around 5 or so over x86. This is intended for SW types so the speed ups are more modest.
For apps that are closer to the 99/1 rule, then it is prudent to rewrite the code in more HW based HDLs and the performance increase can be anywhere from 1-100000x depending on how HW like the operations is. In otherwords if a CPU is running an app for which there is an ASIC equivalent not in the box, then the cpu is just simulating the missing ASIC typically 10-1000x slower. Think of WinModems, DES, MPEG etc all in SW.
So in the previous example that Chris gave of a BeOS box running rc5des beating an Itanium, well if the SW was replaced with a real ASIC chip you would expect the chip to beat SW by many orders of magnitude for just that part of the problem. Since FPGAs run 1 order slower than ASIC but are completely programmable you lose one order out of many.
This sort of improvement won’t help a typical Windows user feel a faster more responsive cpu, but it does help heavy CAD type tools. The usual example is chip simulation, you can buy dedicated accelerators for $1M that are not very programable that speed up ASIC simulations by 4 or 5 orders. These are special purpose boxes for 1 type of job. Low end general purpose PCI boards can be had for closer to $1k, that can be used for many jobs as long as developers are prepared to open their minds to learning HDL (Hardware Description Language) & combining with C/.. code. Right now the Reconfigurable Computing industry is very immature but Intel & AMD are aware of what FPGAs could do for power users but seem to be content pushing rocks uphill.
It would seem complementary to having a general purpose processor.
I know Intel sells an SSL accelerator card (and other companies do as well). If there were an affordable kit available, it would be fun to create specialized hardware. I’d love to play with making a fancy crypto card that gave me near-zero encrypt/decrypt overhead.
I’m going to do a bit of homework, but are these FPGA’s reprogrammable or more like PROM’s?
Thanks again for the interesting comment.
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Off topic
Michael, I generally find myself agreeing with your comments, I also worked with Intel for a few months so the MS & Linux comments are right on.
The crypo app is possible the no one app for you know who & others. Nuron went bust trying to sell FPGA DIMM modules to the SSL market that did crypto only about 5x faster than x86 & used the bandwidth of the SDRAM interface. Most FPGA cards are PCI based so they have a real crippled bottleneck to get through.
The FPGAs that I describe are SRAM based so they are technically expensive since they follow SRAM pricing.
Xilinx (Spartan, Virtex, Virtex2, Virtex Pro) & Altera (I don’t use) are the leading SRAM based FPGAs so they are infinitely reprogramable. Spartans go $10-$30, Virtex goes for $50-$10000 etc. The SW development tools for Spartan are free, see Xilinx Webpack. A Spartan 200 is supposed to be equiv to 200,000 gates of logic at about $20. Xilinx is generally regarded as having the edge over Altera as they include more features to make designing cpus more practical. The top of the line also inludes 4 or so PPC cores for the networking crowd.
Typical clock speed are 50-300MHz, the latter being for the experts. They generally compute about 5-10x slower than ASICs but the NREs can be much lower.
For some industrial uses, 1 time programables are also available, these are generally 1/2 price, 2x faster, good for 1 shot programs often end up in oem equipment. No use for RC though. These often get turned automagically into low end ASICs so they are lot like PROMs.
You could search on FPGA, Xilinx, Altera, Reconfigurable Computing, Celoxica, Nallatech, AlphaData, Annapolis (DSP wizards), fpga.org, Optimagic (Yahoo of FPGAs), even Yahoo etc.
For programming I use Verilog & C++, others use VHDL.
One intereesting note is that X & A are both HyperTransport licenses, I am looking forward to seeing a low cost HT eneabled Spartan device plug in to a socket right on the HT chain of an Hammer board. That would be PCI at 40x speed and so the compute power is matched to IO speed. But I also expect AMD & Xilinx to let this opportunity slide right by.
Most FPGAs include lots of small rams & logic tables 4->1 fn()s & PLL clocks etc. More & more ASIC guys are leaving ASICs behind & working full time on FPGAs. The newest virtex2 3000 parts & others now include boat loads of multipliers (18×18)& memories so some heavy integer DSP can be done equiv to 10-20GHz P4 or full custom ASIC.
My own interests are RC & educating evangelizing for soft HW that SW guys can learn to do & that HW & SW can be more closely related than most HW or SW guys would ever think.
Good luck
has more transistors than the adult population of the United States
I think the adult population of the US have a very large amount of transistors, so I believe quoted statement might be incorrect.
(yes, more off topic)
Thanks for the pointers. I was able to do some basic google searches and found quite a bit of information 😉
There is definitely a wealth of options available for what sorts of FPGA’s you can build. Those new Xilinx Virtex2 Pro chips are astoundingly capable (and expensive).
For HyperTransport, I haven’t seen much information on how to provide for “empty” HT connections/sockets where a FPGA device might be plugged in. It would behoove AMD to make it as easy as possible for the community to leverage HT. We are in the infancy of HT, though.
In the Intel world, PCI-X has good bandwidth these days, though I don’t know what the price curve looks like.
The edge of the fractal that I’m sitting on right now is going through the SFL tutorial. I’m trying to sort through how to actually program these things. I’ll check into Verilog and VHDL shortly. There are so many building blocks in the new FPGA’s… I’m trying to see how these blocks are surfaced to the programmer.
FPGA strikes me as an area that Linux could develop good support for. If volume manufacturing could be found, I could imagine a $150 Protein Folding Supercomputer card that would be quite cool. Or an open source computer security system that uses some very cool and fast FPGA’s.
ANd now back to the SFL 😉
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Itanium 2: Vital statistics
A quick glance at Intel’s new server chip
Code name: McKinley
Originally expected: Second half of 2001
Number of transistors: 221 million
Size: 421 square millimeters
Speeds: 900MHz, 1GHz
Cache size: 3MB or 1.5MB level three cache
Successors: Madison and Deerfield (due 2003), Montecito (2004), Chivano* (2006)
Source: Intel
*Source: various
With approximately 260M people, how many are truly adults? Maybe 3 or 4? 😉 Eugenia stacked the deck on this one…
Now transistors vs. people… Itanium II is very close to surpassing the population. 221M vs. 260+M.
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Michael
Most people are not using the Pros, thats Xilinx dream for the networking crowd or Cisco market. My self I would much rather had seen the Arm be deployed as that is what I use outside as a host controller. Altera did pick Arm though.
The Virtex2 are where the DSP action is with the multipliers, not that expensive. A 3000 part with 3M effective gates (if you substitute every ram, multiplier etc for gate equiv) is about $250 IIRC or same as top Athlon yet if programmed correctly can easily beat the Athlon for dedicated tasks. Such a part on the HT bus is still very early as AMD has said they don’t want to have connectors or sockets, but heck the Hammer is socketed so live with it.
I would like to see Spartan 300 (very best bang for buck & free tools) or Virtex2 on a HT DIMM type module, with some local ram on board. The PCI X is too high cost, servers etc, the HT bus and derivatives will find way to consumer mobos usually as the NS bridge connection. There is a mini PCI to look at as well.
FPGAs are programmed as follows.
Say you work at SW company with high end structured math dsp codec work to do. Currently codecs, dsp math is done by writing in C & asm using MMX or other extentions, programming to the metal. Very hard & very tedious.
The math is usually done in Matlab & plain C as a reference for the algorithm to double check asm version. Only the optimised version is shipped. Now a HW guy joins the team & writes the same Matlab code in Verilog (VHDL is for .edu, .gov & .europe). The Verilog is similated to match the matlab & C models. Eventually the Verilog source is put through synthesis to produce an EDIF file (looks like Lisp). This is then put through place & route SW to produce a .bit file that can be downloaded to FPGA board. The result would be a fat file that includes .exe, .dll & .bit components.
Verilog code is almost entirely about describing the required logic in as parallel a form as possible using pipelined registers and short logic paths for highest speed. Badly designed logic easily can run 100x slower than well designed logic. Better tools (more $) can really help to produce the fastest designs.
In my own flow I also use a V2C compiler that translates Verilog back to C that can then be simulated with a std C env for 0 cost simulation. This will go gpl one day. The same Verilog can go through the free WebPack tools for synthesis & place & route, but this flow is for smaller FPGAs. The bigger FPGAs cost more & the SW tools can easily go to $50K.
Linux has not really played out in FPGAs yet, Linux does run some ASIC tools where Windows has been a failure (except for low end simulation). But in FPGAs, all the tools run on Windows for historical reason yet the newer bigger projects would be better of under a Linux env. Bigger FPGA projects look alot like ASIC projects.
OS HW design has also been in the press, interesting even RS stuck his 2c in. Open HW IP is unlikely to take off unless the field attracts alot more SW people as it is almost entirely HW people now. Free HW just doesn’t sound right.
I doubt seriously that adults in the U.S.A. have any transistors as they are manufactured with organic components.
With the tremendous decrease in the rights of American citizens and the US government going to any length to guard the homeland, and with embedded ID chips already testing in people, I would not be surprised to see people with chips in the next one to five years.
With 260,000,000 million Americans that need to be monitored, expect transistors. Mainsteam biometrics aren’t working too well.
Think long and hard about “Intel Inside” when you are next looking in the mirror. If you see a little blue logo out of the corner of your eye… “baby, you got the chip!”
“Intel announces Humanium processor and the associated Worker Unit chipset”.
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Intel does love Linux for many reasons, including the ones you mentioned on how they use their Linux support vis-a-vis negotiating with Microsoft.
I doubt Intel and IBM like Linux at all !!
I would rather buy an AMD64bit, or, even BETTER, a Sun or Compaq 64bit.
The Intel compiler (30 days trial – Windows and Linux) I got from a Linux magazine doesn’t have many 64bit specs. Maybe they will include this in a “near” ?? future.
Intel and IBM love anything that makes Microsoft squirm! If it had been BeOS instead of Linux, then Intel and IBM would love BeOS! Neither Intel or IBM is really in the OS business. Microsoft is.
I have no idea what Intel did/did not include in their Linux magazine CD.
I’ve used the Intel compiler on XP and Linux and there is a plethora of information on EPIC, code generation, and crafting good code for Itanium.
I’m not saying the current Itanium is the best 64 bit. But it is the start of Intel’s serious move into 64 bit computing. My best experiences with 64 bit computing have been with the Alpha which is a very clean architecture.
The Hammer is interesting. If AMD does a good job with it, the 64 bit computing world will move forward in a big jump. If they fumble it, mass computing 64 bit style will be slow to evolve.
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“The Hammer is interesting. If AMD does a good job with it, the 64 bit computing world will move forward in a big jump. If they
fumble it, mass computing 64 bit style will be slow to evolve. ”
And do all the people who work at AMD also loathe Microsoft?
I’ve never had the opportunity to work with AMD so I don’t know how they feel about Microsoft.
Seeing that Microsoft is working with them to create an X86-64 version of Windows XP and has supported AMD’s chips, even certified them as Windows compatible, over the past few years, there must be at least a decent working relationship. As Microsoft is oxygen to AMD, undoubtedly Microsoft holds the upper hand in the relationship.
Of course, getting Microsoft to adequately support things like HyperTransport will likely be challenging. Itanium has a very sophisticated infrastructure built around it. I know much less what AMD has done with Hammer and whether or not it will require Microsoft to write new code.
I’m eagerly awaiting the computer crop of late2002-2003. Seems like we’ll have some fun stuff:
Intel Northwood Xeons @ 533Mhz FSB, 3Ghz+
Lots of dual channel DDR systems
DDR333 and DDR400
Lots of AGP 8X graphics cards
Serial ATA
LittleHammer, 1-2 processor systems
BigHammer, 1-8 processor systems
It would be great to see some affordable 2 processor 64 bit systems along the lines of AthlonMP.
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I think we’ll see more desktops with AMD-64 than IA-64. Who knows? We may even see 64 bit games just for AMD
Intel is positioning IA-64 as a server chip primarily as well as also supporting its use in high-end scientific workstations.
As for games, yeah, they can port all those Nintendo 64 games to AMD-64 😉
Not to be a naysayer, but I’ve got a bad feeling about that wicked Hypertransport-AGP translation system. I hope they get that thing working with reasonable performance.
I’d love to have a decent and affordable 64 bit system, so I am wishing AMD the best in their Hammer adventure.
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If the IA-64 is the future of Intel & it isn’t for the end user, what the hell is Intel thinking for the rest of us?
MS has gone to alot of trouble to get everyone on a common code base, & Intel is forcing another split. I am sure MS loves that. Of course theres alot of pluses to keeping hi end stuff separate from the mass market. Maybe MS should have bought the Tandem/highend stuff off Compaq.
The Hammer changes to MS I don’t know, but the HT bus is supposed to look like PCI on steroids so there shouldn’t be any driver changes there.
I wouldn’t mind playing with some Hammer MP either, more likely I will go down to some cool C3s & live with the lower speed, I am kind of tired of lots of fans & noise.
If my memory serves me, EVERY OTHER CPU manufacturer (other than AMD) has had a 64 bit chip for YEARS . So, Itanium is something to get excited about? I know there are still those who believe that a monolithic, single user, desktop operating system based on code stolen from IBM can function as a “server” and that Intel thinks that perpetuating this illusion will help them continue to line their pockets, but it really seems to me that they have simply lost it. (Was that a run-on sentence, or what?) Anyway, at least NT doesn’t have to load from DOS anymore.
The HT bus like most of the new high speed busses are serial yes (LVDS signaling), but at the AMD HT seminar I went to recently, I was told that to the device driver it looks just like a PCI interface so the transition to HT should be easier for device driver writers. HT busses can be various widths to increase bandwidth, I have the seminar notes but not all the details are clear. It is still technically a narrow parallel bus as upto 8 data signal can ride with one clk. The data signals do not use self clocking codes or ECC which some what surprised me, I was expecting to see a 10-8 code or similar.
As for the Itanium from what I read a few yrs ago the most important idea is that all instructions are conditional to a level far above that of the ARM single cond bit. The reason of course is the dreaded cond branch which really wreaks havoc with all cpu pipelines as well as I caches. In most architectures they can occur at such frequency that on avg every asm sequence contains a branch every 5 opcodes IIRC. For simple designs like the ARM a tiny if_then_else can be inlined so that all ops are executed for both values of the condition. The result of the condition determines whether the IF or ELSE codes are actually effective. The PC never actually skips. This is great for the majority of inner most tiny if_, loops_ sequences, but both sides of the branch have to be relatively short otherwise the pipeline flushing penalty is replaced by the trying both sides penalty.
Itanium take this to a level where several cond bits can be in effect on groups of codes, the result is that effectively the distance between actual jumps is increased 3 fold if the example given (the 8 queens problem) is to be believed. This would really help the pipeline keep moving, but I am not so sure if this holds up for the typical programs.
If the cpu was always executing purely single threaded apps, this might be a necessary evil that all cpu designers would have to accept. But there is another way, & that is to encourage SW developers to use thread safe parallel programming (ie Occam CSP model, not Java, not C#) so that cpus always switch threads on every branch, msg rd/wr or cache fail. That way the cpu never suffers the problems of deep pipelines being trashed, but it does introduce other issues to be handled such as thread starvation & shared cache space etc.
Intel is thinking that a souped up Pentium 4 with a megabyte or more of onchip cache and a number of architectural enhancements will be good on the desktop for the next couple years.
And they might be right. 32 bit code is smaller/tighter than 64 bit code. And today’s applications, other than a few games, have hardly been tuned to run well. So there is a lot of performance headroom available in the 32 bit world.
A 64 bit chip will usually prevail when it comes to floating point, something AMD has traditionally already been good at in the 32 bit world. Outside of some games, not many desktop applications rely on floating point. A 64 bit chip also gives you a large clean memory space, good for virtual memory and memory-mapped files, both important for databases.
As for HyperTransport (HT), it is a serial bus. It is nothing like AGP or PCI which are both parallel busses. The HT<->AGP3 bridge hasn’t been working in many of the AMD demos which have relied on a PCI video card, so I am concerned about this piece of technology.
Honestly, Intel is in a tough place for 64 bit computing for the masses. They are waiting for their eventual move to smaller geometry processes to make big chips like the Itanium practical for the desktop market. Not only is the Itanium a large chip with all the cache, all the large and fancy support chips add up.
The stage is all set for desktop/mass-market 64 bits and the stage belongs to AMD. We just have to wait a bit and enjoy the show.
I’m ALL for the desktop moving to 64 bits ASAP, as I think it will help PC’s solve new and interesting problems and provide greater value.
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This is a new table. There never has been a 64 bit chip for the mass-market desktop before.
Apple doesn’t have a 64 bit machine.
Intel doesn’t have a 64 bit chip for the desktop.
AMD is the first to approach offering a 64 bit chip for the consumer desktop.
Intel’s entry into the 64 bit world is important as it takes the microprocessor company that exists on making high-volume chips and moves them into a new and interesting market. Intel is being very conservative and starting out in the high-end server space. We don’t get to see what Intel’s approach to the consumer 64 bit market will be for another 1-2 years.
Sure, NT/XP grew up a long hard road from DOS. But Windows 2000 and Windows XP are good operating systems today that vie with anything out there. One can throw stones, but Microsoft is the top dog when it comes to building software that other ISV’s can write good applications for. For whatever else you can say, Microsoft is good at jumping on market opportunities and making something out of them. They do listen.
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I did not find article impressive.
Seems that the author understands very little about CPUs and OSes.
Saying that biggest advantage over x86 is wider address range pretty much says it all. As far booting goes it is again legacy compatibility issue, but not the IA32 capabilities limitation.
ia64 has entirely different architecture – EPIC. That’s way as someone mentioned it needs a compiler tuned to parallel execution pattern.
I think it should be at least as good as V9 CPUs maybe even better. ia64 requires very high banwidth, but when it is available, performance should be above complains.
As far as real world usibility, let’s see what comes out of it. It sure is being released in tough times (goes for V1 and V2)