Chip companies like Qualcomm, Nvidia, and AMD are all either planning or said to be planning another attempt at making Arm chips for the consumer PC market. Qualcomm is leading the charge in mid-2024 with its Snapdragon X Elite and a new CPU architecture called Oryon. And Reuters reported earlier this week that Nvidia and AMD are targeting a 2025 release window for their own Arm chips for Windows PCs. If these companies successfully get their chips into PCs, it would mostly come at Intel’s expense. But Intel CEO Pat Gelsinger doesn’t seem worried about it yet, as he said on the company’s most recent earnings call. The biggest issue for Windows on ARM will be, as always, application compatibility. ARM applications haven’t exactly been pouring in for Windows, and translation layers in Windows haven’t been earth-shattering either. As long as this problem remains, Intel indeed has little to worry about. I’m just excited there’s finally some movement in ARM laptops, because Linux is exceptionally well positioned for the transition to ARM. Every major distribution has a fully functional ARM version, with pretty much full package repository support. There really is very little difference in running desktop Linux on ARM (or even POWER9, for that matter). The power of open source.
The Intel 14th Gen Core series is somewhat of a somber swansong to the traditional and famed Core i series naming scheme, rounding off what feels like the end of an era. With the shift to their upcoming Meteor Lake SoC, the impending launch of the new naming scheme (Core and Core Ultra) branding, and what Intel hopes to be a groundbreaking mobile chiplet-based architecture. The crux of the analysis is if you’re upgrading from an older and outdated desktop platform, the Intel 14th Gen series is a solid performer, but there’s still value in current 13th Gen pricing. Those must be considered in the current global financial situation; some users may find a better deal. If you already have 12th or 13th Gen Core parts, then there’s absolutely no reason to upgrade or consider 14th Gen as a platform, as none of the features (mainly software) justify a sidegrade on which is ultimately the same platform and the same core architecture. AnandTech always delivers. Unlike Intel.
A circuit called the flip-flop is a fundamental building block for sequential logic. A flip-flop can hold one bit of state, a “0” or a “1”, changing its value when the clock changes. Flip-flops are a key part of processors, with multiple roles. Several flip-flops can be combined to form a register, holding a value. Flip-flops are also used to build “state machines”, circuits that move from step to step in a controlled sequence. A flip-flops can also delay a signal, holding it from from one clock cycle to the next. Intel introduced the groundbreaking 8086 microprocessor in 1978, starting the x86 architecture that is widely used today. In this blog post, I take a close look at the flip-flops in the 8086: what they do and how they are implemented. In particular, I will focus on the dynamic flip-flop, which holds its value using capacitance, much like DRAM. Many of these flip-flops use a somewhat unusual “enable” input, which allows the flip-flop to hold its value for multiple clock cycles. More in-depth chip content. This type of content has been coming up a lot lately.
Intel is a newcomer to the world of discrete graphics cards, and the company’s Xe architecture is driving its effort to establish itself alongside AMD and Nvidia. We’ve seen Xe variants serve in integrated GPUs and midrange discrete cards, but Intel’s not stopping there. Their GPU ambitions extend to the datacenter and supercomputing markets. That’s where Ponte Vecchio (PVC) comes in. Like other compute-oriented GPUs, PVC goes wide and slow. High memory bandwidth and FP64 throughput differentiate it from client architectures, which emphasize FP32 throughput and use caching to reduce memory bandwidth demands. Compared to Nvidia’s H100 and AMD’s MI210, PVC stands out because it lacks fixed function graphics hardware. H100 and MI210 still have some form of texture units, but PVC doesn’t have any at all. Combine that with its lack of display outputs, and calling PVC a GPU is pretty funny. It’s really a giant, parallel processor that happens to be programmed in the same way you’d program a GPU for compute. Another great feature from Chips and Cheese. Speaking of Intel – the company also unveiled that Meteor Lake CPUs are coming to the desktop in 2024.
The European Commission has fined Intel $400 million (€376 million) for hindering competitors’ access to the market through naked restrictions between 2002 and 2007. The fine comes after a long-running antitrust court battle dating back to 2009 when the Commission initially fined Intel a record $1.13 billion for abuse of dominance. While some of Intel’s actions, like hidden rebates, were dropped on appeal due to lack of evidence of harm, the Commission upheld that Intel paid PC manufacturers to delay or limit products using AMD processors. Specifically, the Commission cited examples where Intel paid HP not to sell AMD-powered business PCs to small and medium businesses through direct channels from 2002-2005. It also paid Acer to delay the launch of an AMD-based notebook from late 2003 to early 2004. Intel also paid Lenovo to push back the launch of AMD notebooks by six months. While it’s great that fines are being levied for these crimes, the problem is that the damage is already done and a fine won’t actually undo said damage. Of course, there’s no way to know exactly what the industry would’ve looked like had Intel not committed these crimes, but I feel like quite often these fines are more seen as a cost of doing business than as an actual detrimental punishment. It reminds me a lot of speeding tickets – they can be devastating to somebody of lower means, but to the upper classes they’re just the cost of driving a car and barely even register. I’d be much more in favour for not just fining companies that violate antitrust, but also going after the people within those companies that enabled and advocated for such behaviour through massive personal fines and jail time. None of the people involved will feel even the slightest bit of sting from their actions, and will do it all over again next time they get the chance.
Today we have something that has taken months to write, and we feel that the best we have done is to give a sense of what Intel’s coolest CPU is capable of. The Intel Xeon MAX 9480 combines 56 cores with memory on the package. The memory is not standard DDR5. Instead, it is 64GB of HBM2e, the same kind of memory found on many GPUs and AI accelerators today. What seemed like a straightforward review at the outset became absolutely fascinating, especially when we pulled all of the DDR5 memory from a system and watched it boot. Let us get to it. Few of us will ever get to use one of these – especially since they’re specifically designed for a supercomputer – but maybe we’ll get lucky and they end up on eBay or AliExpress ten years from now.
During the opening keynote at Intel’s Innovation event in San Jose, Chief Executive Officer Pat Gelsinger unveiled a score of details about the upcoming Meteor Lake client platform. Intel’s Meteor Lake marks the beginning of a new era for the chipmaker, as they move away from the chaotic Intel 7 node and go into a rollout of their Foveros 3D packaging with EUV lithography for their upcoming client mobile platform. Meteor Lake uses a tiled, disaggregated chiplet architecture for its client-centric processors for the first time, changing the very nature of Intel’s consumer chips going forward. And, according to Intel, all of these changes have allowed them to bring some significant advancements to the mobile market. Intel’s first chiplet-based consumer CPU breaks up the common functions of a modern CPU into four individual tiles: compute, graphics, SoC, and an I/O tile. Within the makeup of the compute tile is a new pair of cores, a P-core named Redwood Cove and a new E-core called Crestmont. Both these cores promise IPC gains over their previous counterparts, but perhaps the most interesting inclusion is a new type of E-core embedded directly into the SoC tile, which Intel calls ‘Low Power Island.’ These new LP E-cores are designed with the idea that light workloads and processes can be taken off the more power-hungry compute tile and offloaded onto a more efficient and lower-powered tile altogether. Other major additions include a first-for-Intel Neural Processing Unit (NPU), which sits within the SoC tile and is designed to bring on-chip AI capabilities for workloads and inferencing, paving the way for the future. With Meteor Lake, Intel is aiming to put themselves in a more competitive position within the mobile market, with notable improvements to compute core hierarchy, Intel’s Xe-LPG Arc-based graphics tile looking to bolster integrated graphics capabilities, and an NPU that adds various AI advantages. Meteor Lake also sets the scene for Intel and modular disaggregation, with Foveros 3D packaging set to become a mainstay of Intel’s processor roadmap for the future, with the Intel 4 process making its debut and acting as a stepping stone to what will become Intel’s next mainstay node throughout its fabs, Intel 3. AnandTech takes its usual in-depth look at Intel’s upcoming Meteor Lake platform, which seems like it will be a rather radical shift for the company. It’s also the first generation whithout Intel’s Core ix naming scheme, so things might be a bit confusing for a while post-launch.
Thunderbolt 5 will deliver 80 gigabits per second (Gbps) of bi-directional bandwidth, and with Bandwidth Boost it will provide up to 120 Gbps for the best display experience. These improvements will provide up to three times more bandwidth than the best existing connectivity solution, providing outstanding display and data connections. Thunderbolt 5 will meet the high bandwidth needs of content creators and gamers. Built on industry standards – including USB4 V2 – Thunderbolt 5 will be broadly compatible with previous versions of Thunderbolt and USB. That’s some serious speed for a cable.
SoftBank has been gearing up anchor investments in Arm Holdings among its clients and partners for months now (ahead of the upcoming IPO) and apparently Intel is among them. In a call for the Goldman Sachs Communacopia & Technology Conference, the head of the company’s foundry business unit confirmed that the chip giant has made an investment in Arm because its technology is strategically important for both Intel Foundry Services and Altera FPGA unit. This doesn’t seem to be an indicator Intel is interested in making ARM chips – it seems to have more to do with Intel becoming a fab for other companies’ ARM chips.
Intel has announced two new x86-64 instruction sets designed to bolster and offer more performance in AVX-based workloads with their hybrid architecture of performance (P) and efficiency (E) cores. The first of Intel’s announcements is their latest Intel Advanced Performance Extensions, or Intel APX as it’s known. It is designed to bring generational, instruction set-driven improvements to load, store and compare instructions without impacting power consumption or the overall silicon die area of the CPU cores. Intel has also published a technical paper detailing their new AVX10, enabling both Intel’s performance (P) and efficiency (E) cores to support the converged AVX10/256-bit instruction set going forward. This means that Intel’s future generation of hybrid desktop, server, and workstation chips will be able to support multiple AVX vectors, including 128, 256, and 512-bit vector sizes throughout the entirety of the cores holistically. The basic gist is that these two new instruction sets should bring more performance at lower energy usage.
Some huge news today. Intel has started to notify its ecosystem saying that it will stop direct investment in the Next Unit of Compute (NUC) business. For the handful of STH readers who are unaware, Intel not only makes chips but they also make systems. Earlier this year, we covered that Intel was exiting the server business and selling it to MiTAC. Now its line of PCs is being sunset as well. Luckily, the market for small, powerful computers is more alive than it’s ever been, and there are countless OEMs making both AMD and Intel tiny computers these days. My only concern would be that Intel exiting this market might mean the kinds of parts needed for tiny computers like the NUC also become harder to source, but since you can always use laptop parts, I doubt that’s going to be an issue.
The Intel i960 was a remarkable 32-bit processor of the 1990s with a confusing set of versions. Although it is now mostly forgotten (outside the many people who used it as an embedded processor), it has a complex history. It had a shot at being Intel’s flagship processor until x86 overshadowed it. Later, it was the world’s best-selling RISC processor. One variant was a 33-bit processor with a decidedly non-RISC object-oriented instruction set; it became a military standard and was used in the F-22 fighter plane. Another version powered Intel’s short-lived Unix servers. In this blog post, I’ll take a look at the history of the i960, explain its different variants, and examine silicon dies. This chip has a lot of mythology and confusion (especially on Wikipedia), so I’ll try to clear things up. Not even Intel can overcome x86 – and I can guarantee you: neither will ARM. The truth is that x86 simply cannot die.
This whitepaper details the architectural enhancements and modifications that Intel is currently investigating for a 64-bit mode-only architecture referred to as x86S (for simplification). Intel is publishing this paper to solicit feedback from the ecosystem while exploring the benefits of extending the ISA transition to a 64-bit mode-only solution. This seems like a very good idea – and it does seem like the time is ripe to remove some of the unused cruft from x86. Intel is proposing removing removing the 16 bit and 32 bit modes, and instead start in 64 bit mode right away. The company’s proposal does retain the ability to run 32 bit code on a 64 bit operating system, though. As a sidenote, the introduction to this proposal is hilarious: Since its introduction over 20 years ago, the Intel® 64 architecture became the dominant operating mode. As an example of this evolution, Microsoft stopped shipping the 32-bit version of their Windows 11 operating system. Intel firmware no longer supports non UEFI64 operating systems natively. 64-bit operating systems are the de facto standard today. They retain the ability to run 32-bit applications but have stopped supporting 16-bit applications natively. It’s 2023, and Intel is still not, in any way, capable of acknowledging AMD for coming up with AMD64. Sad.
With the benefit of hindsight, seems misconceived on just about every level. Six years in development, it was repeatedly delayed and when it was finally launched it was too slow and hardly sold at all. It was officially cancelled in 19861, just five years after it first went on sale. It’s not an exaggeration to call it a commercial disaster. So whilst it’s interesting to look at the reasons why the iAPX432 failed, it’s also useful to consider why Intel’s senior management thought it would work and why they got it wrong. If they could make these mistakes, then anyone could. We’ll look at the story of the iAPX432, examine some of its technical innovations and failures, and then try to understand why Intel got it wrong. An excellent deep dive into iAPX432, an architecture most of us will have zero experience with. Considering the recent passing of Gordon Moore, take some time to understand one of his company’s major bets that didn’t work out.
One interesting aspect of a computer’s instruction set is its addressing modes, how the computer determines the address for a memory access. The Intel 8086 (1978) used the ModR/M byte, a special byte following the opcode, to select the addressing mode. The ModR/M byte has persisted into the modern x86 architecture, so it’s interesting to look at its roots and original implementation. In this post, I look at the hardware and microcode in the 8086 that implements ModR/M and how the 8086 designers fit multiple addressing modes into the 8086’s limited microcode ROM. One technique was a hybrid approach that combined generic microcode with hardware logic that filled in the details for a particular instruction. A second technique was modular microcode, with subroutines for various parts of the task. This is way above my pay grade, but I know quite a few of you love this kind of writing. Very in-depth.
Intel recently announced a big driver update for their Arc GPUs on Windows, because their DirectX 9 performance wasn’t as good as it could have been. Turns out, they’re using code from the open source DXVK which is part of Steam Play Proton. DXVK translates Direct3D 9, Direct3D 10 and Direct3D 11 to Vulkan. Primarily written for Wine, the Windows compatibility layer, which is what Proton is made from (Proton is what the majority of games on Steam Deck run through). However, it also has a Native implementation for Linux and it can be used even on Windows too. So it’s not a big surprise to see this. Heck, even NVIDIA use DXVK for RTX Remix. Windows gamers benefiting from open source technology for gaming on Linux. My my, the turntables!
Intel has officially revealed its Intel On Demand program (opens in new tab) that will activate select accelerators and features of the company’s upcoming Xeon Scalable Sapphire Rapids processor. The new pay-as-you-go program will allow Intel to reduce the number of SKUs it ships while still capitalizing on the technologies it has to offer. Furthermore, its clients will be able to upgrade their machines without replacing actual hardware or offering additional services to their clients. Intel’s upcoming Intel’s 4th Generation Xeon Scalable Sapphire Rapids processors are equipped with various special-purpose accelerators and security technologies that all customers do not need at all times. To offer such end-users additional flexibility regarding investments, Intel will deliver them to buy its CPUs with those capabilities disabled but turn them on if they are needed at some point. The Software Defined Silicon (SDSi) technology will also allow Intel to sell fewer CPU models and then enable its clients or partners to activate certain features if needed (to use them on-prem or offer them as a service). On the one hand, in a perfect world where people and companies are fair, this seems like a great idea – it allows you to buy one processor (or, in the datacentre case, one batch of processors) and then unlock additional features and capabilities as your needs change. Sadly, the world is not perfect and people and companies are not fair, so this is going be ripe for abuse. We all know it.
The 8086 microprocessor is one of the most important chips ever created; it started the x86 architecture that still dominates desktop and server computing today. I’ve been reverse-engineering its circuitry by studying its silicon die. One of the most unusual circuits I found is a “bootstrap driver”, a way to boost internal signals to improve performance. This circuit consists of just three NMOS transistors, amplifying an input signal to produce an output signal, but it doesn’t resemble typical NMOS logic circuits and puzzled me for a long time. Eventually, I stumbled across an explanation: the “bootstrap driver” uses the transistor’s capacitance to boost its voltage. It produces control pulses with higher current and higher voltage than otherwise possible, increasing performance. In this blog post, I’ll attempt to explain how the tricky bootstrap driver circuit works. I don’t fully understand all the details, but I do grasp the main point here. This is quite an ingenious design.
Intel’s highest-end graphics card lineup is approaching its retail launch, and that means we’re getting more answers to crucial market questions of prices, launch dates, performance, and availability. Today, Intel answered more of those A700-series GPU questions, and they’re paired with claims that every card in the Arc A700 series punches back at Nvidia’s 18-month-old RTX 3060. After announcing a $329 price for its A770 GPU earlier this week, Intel clarified it would launch three A700 series products on October 12: The aforementioned Arc A770 for $329, which sports 8GB of GDDR6 memory; an additional Arc A770 Limited Edition for $349, which jumps up to 16GB of GDDR6 at slightly higher memory bandwidth and otherwise sports otherwise identical specs; and the slightly weaker A750 Limited Edition for $289. These are excellent prices, and assuming Intel can deliver enough supply to meet demand, I think I may have found my next GPU. If history is anything to go by, these will have excellent Linux support, but of course, we would be wise to let the enthusiasts iron out the bugs and issues. Six to twelve months after launch, these could be amazing allrounders for a very good price.
Today, Intel introduces a new processor for the essential product space: Intel Processor. The new offering will replace the Intel Pentium and Intel Celeron branding in the 2023 notebook product stack. Those are some old, long-standing brands Intel just put out to pasture. “Intel Processor” will exist next to the Core i product lines as budget processors, just like Pentium and Celeron do today.